{"id":185,"date":"2026-07-08T09:00:00","date_gmt":"2026-07-08T09:00:00","guid":{"rendered":"https:\/\/rlxsolutions.com\/blog\/led-pcb-manufacturing\/"},"modified":"2026-07-08T09:00:00","modified_gmt":"2026-07-08T09:00:00","slug":"led-pcb-manufacturing","status":"publish","type":"post","link":"https:\/\/rlxsolutions.com\/blog\/led-pcb-manufacturing\/","title":{"rendered":"LED PCB &#038; Circuit Board Manufacturing Guide"},"content":{"rendered":"<p>\n    LED <a href=\"https:\/\/rlxsolutions.com\/pcb-manufacturing.html\">PCB manufacturing<\/a> starts with heat, not routing density. The board must move heat away from the LED package while keeping copper, dielectric, finish, solder mask, and assembly choices compatible with the electrical design. <a href=\"https:\/\/rlxsolutions.com\/\">RLX Solutions<\/a>, a contract electronics manufacturer in Concord, Ontario, reviews those decisions against the proposed stackup before fabrication begins.\n  <\/p>\n<h2>Start with the LED thermal path<\/h2>\n<p>\n    An LED printed circuit board has two jobs at the same time: carry current to the light-emitting devices and move heat away from their junctions. That second job changes how you should approach the bare PCB. For other sectors, see our <a href=\"https:\/\/rlxsolutions.com\/blog\/pcb-industry-guides\/\">guide to PCB applications by industry<\/a>.\n  <\/p>\n<p>\n    Heat generated inside an LED package must pass through the package thermal pad or leads, into the copper, through the board structure, and eventually into a heat sink, enclosure, chassis, or ambient air. Every interface in that path adds thermal resistance.\n  <\/p>\n<p>\n    That is why copying a conventional control-board stackup into a high-power lighting design can create problems even when the schematic is electrically correct. A board can pass continuity testing and still run the LEDs hotter than intended.\n  <\/p>\n<p>The first fabrication questions should therefore be tied to the thermal model:<\/p>\n<ul>\n<li>Where does heat enter the PCB?<\/li>\n<li>Does it spread laterally through copper or move vertically through thermal vias?<\/li>\n<li>Is the circuit board itself part of the heat-spreading structure?<\/li>\n<li>Does the board contact a chassis or heat sink?<\/li>\n<li>How much copper is needed for both current carrying and heat spreading?<\/li>\n<li>Will filled vias or via-in-pad structures be required beneath exposed thermal pads?<\/li>\n<\/ul>\n<p>\n    These decisions need to be established before trace geometry and drilling are frozen. Changing the thermal path late can affect drill sizes, copper weight, layer construction, pad design, solder paste behaviour, and assembly inspection.\n  <\/p>\n<h2>Choose FR-4, aluminium MCPCB, or copper core from the heat path<\/h2>\n<p>\n    FR-4 is often suitable when the LED power density is moderate and the design has another effective path for moving heat away from the board. Metal-core construction becomes more relevant when the circuit board itself has to conduct heat into a mechanical structure.\n  <\/p>\n<p>\n    A metal-core printed circuit board, or MCPCB, uses a metal base beneath the circuit and dielectric structure. Aluminium is common because it combines heat spreading with practical mechanical properties. Copper-core boards provide another option when the thermal and electrical design warrants a different metal base.\n  <\/p>\n<p>\n    For LED manufacturing, aluminium MCPCB options can use 1100, 3003, 5052, or 6061 aluminium. Copper-core construction can use C1100 copper. FR-4 options include standard Tg 135\u00b0C material as well as high-Tg 150\u00b0C, 170\u00b0C, and 180\u00b0C grades.\n  <\/p>\n<table>\n<thead>\n<tr>\n<th>Decision factor<\/th>\n<th>FR-4 PCB<\/th>\n<th>Aluminium MCPCB<\/th>\n<th>Copper-core PCB<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Primary role<\/td>\n<td>Electrical interconnect with conventional laminate structure<\/td>\n<td>Electrical interconnect plus metal-backed heat spreading<\/td>\n<td>Electrical interconnect with a copper thermal structure<\/td>\n<\/tr>\n<tr>\n<td>Thermal design<\/td>\n<td>Often relies more heavily on copper planes, vias, heat sinks, or enclosure contact<\/td>\n<td>Metal base becomes part of the heat path<\/td>\n<td>Copper base becomes part of the heat path<\/td>\n<\/tr>\n<tr>\n<td>Routing flexibility<\/td>\n<td>Well suited to multilayer control and driver circuitry<\/td>\n<td>Often selected where thermal transfer drives the board construction<\/td>\n<td>Selected when the thermal design justifies the material and process<\/td>\n<\/tr>\n<tr>\n<td>Design review focus<\/td>\n<td>Stackup, copper distribution, vias, temperature<\/td>\n<td>Dielectric interface, metal base, attachment method<\/td>\n<td>Stackup, isolation, copper structure, mechanical integration<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>\n    Material alone does not solve an LED thermal problem. A metal base can spread heat effectively only if the path from the LED package to that base has been designed correctly.\n  <\/p>\n<p>\n    For example, moving from FR-4 to aluminium does little to help if a large thermal pad is isolated by an inappropriate copper pattern or if the mechanical interface to the heat sink introduces another high-resistance boundary. The complete junction-to-ambient path still matters.\n  <\/p>\n<h2>Copper weight changes routing and heat spreading<\/h2>\n<p>\n    Copper weight affects current capacity, heat spreading, etching behaviour, and the minimum geometry that can be manufactured consistently.\n  <\/p>\n<p>\n    Outer-layer copper can be specified at 0.5, 1, 2, or 3 oz, with heavier 4 to 6 oz outer copper available where the design calls for it. Inner layers can use 0.5, 1, or 2 oz, with heavier inner copper requiring additional manufacturing consideration.\n  <\/p>\n<p>\n    The design consequence is easy to miss: increasing copper thickness can reduce the amount of fine geometry available.\n  <\/p>\n<p>\n    A 2-layer board using 1 oz copper can support 3 mil trace and 3 mil spacing within the fabrication envelope discussed here. On a 2-layer board using 2 oz copper, that geometry changes to 6 mil trace and 6 mil spacing.\n  <\/p>\n<p>\n    That is a manufacturing effect of the etching process. Thick copper requires more material to be removed, and the sidewall of the conductor is affected as the copper is etched. A layout that is comfortable at 1 oz should not automatically be reused after switching to 2 oz.\n  <\/p>\n<p>\n    For an LED board, wider copper also performs useful thermal work. Large pours around LED thermal pads and driver components can spread heat before it reaches vias or a mechanical interface.\n  <\/p>\n<p>\n    The practical design sequence is therefore electrical current first, thermal spreading second, and manufacturable spacing third. Treating copper weight as a fabrication note added at release can force routing changes after layout is supposedly complete.\n  <\/p>\n<h2>Design vias for heat without breaking drill limits<\/h2>\n<p>\n    A thermal via is a plated hole used primarily to move heat between copper regions rather than to provide ordinary signal routing. Arrays of these vias are common beneath exposed pads and other components that need a short vertical thermal path.\n  <\/p>\n<p>\n    The hole geometry still has to behave like any other plated feature.\n  <\/p>\n<p>\n    Mechanical plated through-holes can be drilled down to 0.15 mm. The normal maximum plated-hole aspect ratio is 10:1, with 12:1 requiring project-specific confirmation. Aspect ratio is the relationship between board thickness and drilled-hole diameter, so board thickness and via diameter cannot be specified independently.\n  <\/p>\n<p>Consider a hypothetical 1.6 mm thick LED controller PCB.<\/p>\n<p>\n    With a 0.20 mm finished hole target, the simple thickness-to-hole relationship is:\n  <\/p>\n<p><strong>1.6 \u00f7 0.20 = 8:1<\/strong><\/p>\n<p>\n    That sits inside a 10:1 process window.\n  <\/p>\n<p>\n    Reduce the hole to 0.15 mm without changing the board thickness:\n  <\/p>\n<p><strong>1.6 \u00f7 0.15 \u2248 10.7:1<\/strong><\/p>\n<p>\n    The layout has saved little surface area, but the plating task has become materially harder. A manufacturer now has to confirm that the hole structure is appropriate rather than treating it as an ordinary drill choice.\n  <\/p>\n<p>\n    The same reasoning matters when vias sit directly inside a component pad. Via-in-pad processing uses resin fill followed by a copper cap and planarization so the assembly pad remains solderable. Without fill and cap, solder can wick into an open via during reflow, changing the solder volume beneath the component.\n  <\/p>\n<p>\n    That process is especially relevant around exposed thermal pads, dense driver packages, and ball grid array fanout. It adds fabrication stages, so it should be deliberately specified rather than created accidentally by placing ordinary open vias in an assembly pad.\n  <\/p>\n<p>\n    For denser multilayer LED electronics, laser-drilled microvias can reach 0.10 mm and can be stacked or staggered. Blind vias require sequential lamination on 4-layer and higher constructions. Buried vias can connect inner layer pairs. Each changes the fabrication sequence before assembly begins. Related reading: <a href=\"https:\/\/rlxsolutions.com\/blog\/industrial-pcb-manufacturing\/\">Industrial PCB Manufacturing: Design, Assembly &amp; Production Guide<\/a>.\n  <\/p>\n<h2>Surface finish and solder mask shape assembly behaviour<\/h2>\n<p>\n    Surface finish protects exposed copper and creates the interface that will be soldered during assembly. For an LED PCB, the decision should follow the component terminations, pad geometry, reflow process, storage requirements, and any later electrical contact requirements.\n  <\/p>\n<p>\n    Available finishes include lead-free SnCuNi hot air solder levelling (HASL), tin-lead HASL, electroless nickel immersion gold (ENIG), electroless nickel electroless palladium immersion gold (ENEPIG), immersion silver, immersion tin, organic solderability preservative (OSP), and hard gold for contact areas such as gold fingers.\n  <\/p>\n<p>\n    ENIG uses 3 to 6 \u03bcm of nickel with 0.05 to 0.1 \u03bcm of gold. OSP is suited to single-reflow builds. ENEPIG is relevant where requirements such as wire bonding or extended shelf life affect the finish decision.\n  <\/p>\n<p>\n    Solder mask also does functional work on a lighting board.\n  <\/p>\n<p>\n    White mask is often selected when the optical design benefits from a light-coloured board surface. Black mask can suit products where stray light control or visual contrast matters. Green, blue, red, yellow, purple, matte green, and matte black are also manufacturing options.\n  <\/p>\n<p>\n    Liquid photoimageable solder mask can be applied at 10 to 25 \u03bcm thickness. The minimum mask dam is 0.08 mm between pads, with a 0.05 mm-per-side default expansion.\n  <\/p>\n<p>\n    Those dimensions matter around dense LED packages. If two pads leave too little room for a stable mask web, the designer may have to change the mask opening strategy rather than assuming the fabrication data will be reproduced exactly as drawn.\n  <\/p>\n<p>\n    Solderability should also be considered with assembly inspection. An attractive optical surface cannot compensate for inconsistent paste deposition or an unsuitable pad definition.\n  <\/p>\n<h2>Same four layers can have very different manufacturing cost<\/h2>\n<p>\n    Layer count is a poor cost proxy by itself. Two four-layer LED circuit boards can pass through very different numbers of process steps.\n  <\/p>\n<p>\n    Consider these hypothetical boards for the same general class of lighting controller.\n  <\/p>\n<table>\n<thead>\n<tr>\n<th>Decision factor<\/th>\n<th>Board A<\/th>\n<th>Board B<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Layer count<\/td>\n<td>4 layers<\/td>\n<td>4 layers<\/td>\n<\/tr>\n<tr>\n<td>Board thickness<\/td>\n<td>1.6 mm<\/td>\n<td>1.6 mm<\/td>\n<\/tr>\n<tr>\n<td>Laminate<\/td>\n<td>FR-4<\/td>\n<td>High-Tg FR-4<\/td>\n<\/tr>\n<tr>\n<td>Outer copper<\/td>\n<td>1 oz<\/td>\n<td>2 oz<\/td>\n<\/tr>\n<tr>\n<td>Routing<\/td>\n<td>6\/6 mil in dense areas<\/td>\n<td>Geometry adjusted for heavier copper<\/td>\n<\/tr>\n<tr>\n<td>Main vias<\/td>\n<td>0.30 mm plated through-holes<\/td>\n<td>0.20 mm plated through-holes plus via-in-pad<\/td>\n<\/tr>\n<tr>\n<td>Via-in-pad treatment<\/td>\n<td>None<\/td>\n<td>Resin filled, copper capped, planarized<\/td>\n<\/tr>\n<tr>\n<td>Surface finish<\/td>\n<td>Lead-free HASL<\/td>\n<td>ENIG<\/td>\n<\/tr>\n<tr>\n<td>Solder mask<\/td>\n<td>Green<\/td>\n<td>White<\/td>\n<\/tr>\n<tr>\n<td>Driver package<\/td>\n<td>Leads accessible to optical inspection<\/td>\n<td>Exposed thermal pad requiring additional inspection attention<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>\n    Board A follows a comparatively direct drilling, plating, imaging, finishing, and masking flow.\n  <\/p>\n<p>\n    Board B still has only four copper layers, but its cost drivers are different. Heavier outer copper changes imaging and etching conditions. Filled and capped vias introduce additional processing and planarization. ENIG adds a different finish sequence. The exposed thermal pad also affects how assembly quality will be verified.\n  <\/p>\n<p>\n    So the question is not, &#8220;How many layers does the board have?&#8221; It is, &#8220;How many distinct manufacturing operations does this stackup require, and which ones add inspection or process control?&#8221;\n  <\/p>\n<p>\n    That distinction becomes increasingly important when buyers compare quotations. A four-layer price benchmark from a simple control board is not a meaningful benchmark for a four-layer LED driver board using filled thermal structures and a different finish.\n  <\/p>\n<h2>Assembly inspection catches failures fabrication cannot<\/h2>\n<p>\n    A bare board can meet its fabrication requirements and still produce a poor LED assembly. Paste printing, component placement, reflow, hidden solder joints, polarity, and thermal-pad wetting all happen after PCB fabrication. Learn more about <a href=\"https:\/\/rlxsolutions.com\/pcb-assembly.html\">PCB assembly, inspection, and test<\/a>.\n  <\/p>\n<p>\n    That makes assembly inspection part of the manufacturing plan rather than a separate purchasing topic.\n  <\/p>\n<p>\n    Solder paste inspection (SPI) can examine paste volume, area, and offset before reflow. Catching an insufficient or shifted deposit at this point prevents the defect from becoming a solder-joint problem later.\n  <\/p>\n<p>\n    Automated optical inspection (AOI) after reflow checks visible assembly features on both sides. X-ray inspection adds information for hidden structures such as ball grid arrays, land grid arrays, and quad-flat no-lead package thermal pads, including void analysis where required.\n  <\/p>\n<p>\n    Manual inspection to IPC-A-610 Class 2 or Class 3 adds workmanship review under magnification. The selected class changes workmanship expectations, but the class should be agreed as a build requirement rather than treated as a label added after production.\n  <\/p>\n<p>\n    Testing then moves from appearance to electrical behaviour. Flying-probe in-circuit test can cover prototypes and lower-volume builds without a dedicated fixture. Bed-of-nails in-circuit testing becomes relevant when a production programme justifies a fixture. Functional test can run to the customer&#8217;s specification and log pass or fail results against serial traceability.\n  <\/p>\n<p>\n    A first article inspection before releasing the production lot is particularly valuable for LED products. Polarity, optical orientation, connector direction, programming, and mechanical fit can all be correct electrically while still being wrong for the final product.\n  <\/p>\n<h2>Specify the LED BOM as tightly as the PCB stackup<\/h2>\n<p>\n    An LED assembly can change visibly even when the circuit design stays the same. Optical binning, colour temperature, forward-voltage grouping, package revision, driver selection, and substitutions can affect the finished product.\n  <\/p>\n<p>\n    Those requirements belong in the bill of materials (BOM) and purchasing documentation, not in informal correspondence.\n  <\/p>\n<p>\n    For a controlled build, the BOM should identify the approved manufacturer and exact manufacturer part number for parts where substitution is restricted. Any acceptable alternates should be explicit. If an LED&#8217;s optical bin or another ordering suffix matters, it should be captured as part of the controlled part definition.\n  <\/p>\n<p>\n    Component procurement also needs stronger verification when parts come from channels outside normal authorized distribution.\n  <\/p>\n<p>\n    A counterfeit-prevention workflow can include source vetting, packaging inspection, date-code and country-of-origin checks, visual inspection to IDEA-STD-1010 criteria, lot verification, X-ray examination, electrical testing, and escalation to third-party decapsulation or die analysis where the risk justifies it.\n  <\/p>\n<p>\n    That becomes especially relevant when an LED driver, power semiconductor, controller, or other part has become allocated, obsolete, or difficult to source. A schematic-equivalent device is not automatically a production-equivalent device.\n  <\/p>\n<h2>Release complete fabrication and assembly data<\/h2>\n<p>\n    A manufacturer should not have to infer the LED board&#8217;s construction from Gerbers alone.\n  <\/p>\n<p>\n    For bare PCB fabrication, manufacturing data can be supplied as Gerber RS-274X, ODB++, or IPC-2581 together with NC drill data. Stackup documentation, impedance requirements, and fabrication notes should accompany the image data when those requirements apply.\n  <\/p>\n<p>\n    For an assembled circuit board, add the controlled BOM, pick-and-place or centroid file, and assembly drawing.\n  <\/p>\n<p>\n    The package should answer the questions that cannot safely be reconstructed from copper artwork:\n  <\/p>\n<ol>\n<li>State the board material and finished thickness.<\/li>\n<li>Define copper weight by layer.<\/li>\n<li>Identify controlled-impedance nets and targets where applicable.<\/li>\n<li>Call out filled, capped, blind, buried, or laser-drilled vias deliberately.<\/li>\n<li>Specify surface finish and solder mask requirements.<\/li>\n<li>Provide component polarity and orientation information in the assembly drawing.<\/li>\n<li>Identify controlled substitutions and non-substitutable BOM items.<\/li>\n<li>Supply the intended workmanship class and any programme-specific test requirements.<\/li>\n<\/ol>\n<p>\n    An engineer-reviewed design for manufacturability (DFM) review is most useful at this stage because the design is still actionable. A drill-to-thickness issue, narrow mask dam, inappropriate copper geometry, or ambiguous via treatment is cheaper to correct in the release package than after material has entered production.\n  <\/p>\n<h2>Prepare the build for quote and DFM review<\/h2>\n<p>\n    If your LED board is moving from layout into prototype, pilot, or production, RLX Solutions can review the fabrication and assembly package as part of the quoting process. Send the Gerber, ODB++ or IPC-2581 data, drill files, stackup information, and, for assembly, the BOM, centroid data, and assembly drawing so thermal, fabrication, sourcing, and test requirements can be reviewed together.\n  <\/p>\n<section class=\"faq\">\n<h2>FAQ<\/h2>\n<h3>Can an LED circuit board use 2 oz or 3 oz copper?<\/h3>\n<p>\n      Yes. Outer-layer copper can be specified at 0.5, 1, 2, or 3 oz, with heavier copper available for designs that require it. Increasing copper weight can help with current distribution and heat spreading, but it also affects achievable trace and spacing geometry. Recheck routing rules whenever copper thickness changes.\n    <\/p>\n<h3>When should via-in-pad be considered under an LED driver?<\/h3>\n<p>\n      Via-in-pad is useful when a thermal or electrical connection needs to sit directly inside the component pad and conventional fanout consumes too much space. The vias are resin filled, copper capped, and planarized. This prevents open via holes from drawing solder away from the pad during reflow and leaves a flat assembly surface.\n    <\/p>\n<h3>How are hidden solder joints on LED driver packages inspected?<\/h3>\n<p>\n      X-ray inspection can examine joints that automated optical inspection cannot see directly, including ball grid arrays, land grid arrays, and thermal pads beneath quad-flat no-lead packages. It can also support void analysis. SPI before reflow and AOI after reflow provide additional process information for the visible portions of the assembly.\n    <\/p>\n<h3>What is the smallest plated hole available for an LED PCB?<\/h3>\n<p>\n      The minimum mechanical plated through-hole is 0.15 mm. Laser-drilled microvias can reach 0.10 mm. Hole diameter still has to be checked against finished board thickness because the resulting aspect ratio affects plating. A small drill that works on a thin board may require additional review on a thicker construction.\n    <\/p>\n<h3>Can bare LED PCBs and assembled boards be handled under one programme?<\/h3>\n<p>\n      Yes. A turnkey assembly programme can combine component procurement, bare PCB fabrication or sourcing, assembly, inspection, testing, and shipment. Kitted and consigned models are also available when the customer wants to supply some or all components. The right model is mainly a question of purchasing responsibility and component control.\n    <\/p>\n<\/section>\n","protected":false},"excerpt":{"rendered":"<p>LED PCB manufacturing starts with heat, not routing density. The board must move heat away from the LED package while [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":184,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"nf_dc_page":"","site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"footnotes":""},"categories":[20],"tags":[],"class_list":["post-185","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-industry-guides"],"_links":{"self":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/185","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/comments?post=185"}],"version-history":[{"count":0,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/185\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media\/184"}],"wp:attachment":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media?parent=185"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/categories?post=185"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/tags?post=185"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}