{"id":190,"date":"2026-07-10T09:00:00","date_gmt":"2026-07-10T09:00:00","guid":{"rendered":"https:\/\/rlxsolutions.com\/blog\/pcb-design-review-checklist\/"},"modified":"2026-07-10T09:00:00","modified_gmt":"2026-07-10T09:00:00","slug":"pcb-design-review-checklist","status":"publish","type":"post","link":"https:\/\/rlxsolutions.com\/blog\/pcb-design-review-checklist\/","title":{"rendered":"PCB Design Review Checklist Before Production"},"content":{"rendered":"<p>\n    A <a href=\"https:\/\/rlxsolutions.com\/blog\/pcb-engineering-guide\/\">PCB design<\/a> review before production should confirm the stackup, drill plan, copper geometry,<br \/>\n    impedance targets, component data, assembly clearances, test access, and manufacturing files<br \/>\n    before release. <a href=\"https:\/\/rlxsolutions.com\/\">RLX Solutions<\/a>, a contract electronics manufacturer in Concord, Ontario, uses<br \/>\n    engineer-reviewed DFM to catch issues that can otherwise become fabrication, assembly, sourcing,<br \/>\n    or test problems.\n  <\/p>\n<p>\n    The production review is the point where electrical intent meets manufacturing reality.<br \/>\n    A schematic can be correct while the printed circuit board remains difficult to fabricate,<br \/>\n    assemble, inspect, or test.\n  <\/p>\n<p>\n    Design for manufacturability (DFM) is the review of whether the bare PCB can be produced<br \/>\n    consistently from the released data. <a href=\"https:\/\/rlxsolutions.com\/blog\/dfm-vs-dfa\/\">Design for assembly<\/a> (DFA) asks the related question at<br \/>\n    component level: can the board be populated, soldered, inspected, reworked, and tested without<br \/>\n    creating avoidable process risk?\n  <\/p>\n<p>\n    The checklist below treats those as connected decisions rather than separate sign-offs.\n  <\/p>\n<h2>Freeze the PCB Stackup Before You Finish Routing<\/h2>\n<p>\n    The stackup should be a design input, not a document created after layout. Layer count,<br \/>\n    dielectric construction, copper weight, controlled-impedance structures, and total board<br \/>\n    thickness affect trace geometry, drilling, lamination, and signal performance.\n  <\/p>\n<p>Before production release, verify:<\/p>\n<ul>\n<li>\n      <strong>Layer order and function.<\/strong><br \/>\n      Make sure every signal, plane, and mixed layer in the design database matches the fabrication drawing.\n    <\/li>\n<li>\n      <strong>Copper weight by layer.<\/strong><br \/>\n      Trace width that works on a lighter copper layer may need to change when copper becomes heavier.\n    <\/li>\n<li>\n      <strong>Finished thickness.<\/strong><br \/>\n      Mechanical constraints such as card guides, connectors, edge interfaces, and enclosure slots<br \/>\n      depend on the finished board, not the nominal laminate alone.\n    <\/li>\n<li>\n      <strong>Reference-plane continuity.<\/strong><br \/>\n      High-speed signals should not cross plane splits or make unexplained reference changes.\n    <\/li>\n<li>\n      <strong>Impedance targets.<\/strong><br \/>\n      State the target, relevant nets, reference layer, and required construction rather than<br \/>\n      expecting the fabricator to infer them.\n    <\/li>\n<\/ul>\n<p>\n    Controlled impedance is the deliberate control of a transmission line&#8217;s geometry and dielectric<br \/>\n    environment so its characteristic impedance stays within the specified range. The trace width<br \/>\n    alone does not define it.\n  <\/p>\n<h3>Worked Example: The Same 10 Layers Can Require Very Different Processing<\/h3>\n<p>Consider two hypothetical 10-layer circuit boards.<\/p>\n<table>\n<thead>\n<tr>\n<th>Decision Factor<\/th>\n<th>Board A<\/th>\n<th>Board B<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Layer count<\/td>\n<td>10 layers<\/td>\n<td>10 layers<\/td>\n<\/tr>\n<tr>\n<td>Main via structure<\/td>\n<td>Through vias<\/td>\n<td>Layer 1 to 2 microvias, Layer 2 to 3 microvias, plus buried vias<\/td>\n<\/tr>\n<tr>\n<td>Lamination approach<\/td>\n<td>Conventional multilayer construction<\/td>\n<td>Sequential lamination required by the blind and buried structures<\/td>\n<\/tr>\n<tr>\n<td>Drilling<\/td>\n<td>Mechanical drilling<\/td>\n<td>Mechanical plus laser drilling<\/td>\n<\/tr>\n<tr>\n<td>Via filling<\/td>\n<td>Not required for ordinary through vias<\/td>\n<td>May be required where microvias terminate in pads<\/td>\n<\/tr>\n<tr>\n<td>DFM sensitivity<\/td>\n<td>Driven mainly by hole size, annular ring and aspect ratio<\/td>\n<td>Driven by build sequence, registration, microvia geometry and fill\/cap requirements<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>\n    A purchasing system that looks only at layer count treats these boards as equivalent. They are<br \/>\n    not. Board B introduces additional drilling and lamination stages before assembly starts.\n  <\/p>\n<p>\n    That difference is why via architecture belongs in the design review before the quote and<br \/>\n    production package are frozen.\n  <\/p>\n<h2>Check Every Hole Against the Finished Board Thickness<\/h2>\n<p>\n    Drill diameter cannot be reviewed in isolation. A plated hole passes through a defined thickness,<br \/>\n    and the resulting depth-to-diameter relationship affects plating. Learn more about <a href=\"https:\/\/rlxsolutions.com\/pcb-manufacturing.html\">bare PCB fabrication requirements<\/a>.\n  <\/p>\n<p>\n    Aspect ratio is the relationship between hole depth and drilled diameter. As the hole becomes<br \/>\n    deeper relative to its diameter, uniform plating through the barrel becomes harder.\n  <\/p>\n<p>\n    For example, consider a hypothetical 2.0 mm thick board with a 0.20 mm finished through hole.<br \/>\n    Ignoring process allowances for the moment, the geometry is already near a 10:1 depth-to-diameter<br \/>\n    relationship. If the same board uses a 0.15 mm hole, the geometric ratio rises to roughly 13.3:1.\n  <\/p>\n<p>The review should therefore cross-check hole size against:<\/p>\n<ul>\n<li>Finished PCB thickness<\/li>\n<li>Whether the hole is plated or non-plated<\/li>\n<li>Via type<\/li>\n<li>Annular ring<\/li>\n<li>Layer pairs being connected<\/li>\n<li>Whether the via will be filled or capped<\/li>\n<li>Component lead dimensions where the hole is used for through-hole assembly<\/li>\n<\/ul>\n<p>\n    Do not wait for a drill table rejection to discover that board thickness and hole geometry were<br \/>\n    specified independently.\n  <\/p>\n<h3>Review Blind, Buried and Microvias as a Build Sequence<\/h3>\n<p>\n    A blind via connects an outer layer to one or more internal layers without passing through the<br \/>\n    whole PCB. A buried via connects internal layers and is invisible from both outer surfaces.\n  <\/p>\n<p>\n    Those structures change how the board is laminated and drilled.\n  <\/p>\n<p>\n    If a six-layer design calls for a buried connection from Layer 3 to Layer 4 plus a blind<br \/>\n    connection from Layer 1 to Layer 2, the manufacturer needs to know that architecture early enough<br \/>\n    to establish the lamination sequence. A late change from through vias to blind vias is therefore<br \/>\n    not a local drill edit. It can change the construction of the board.\n  <\/p>\n<p>\n    Via-in-pad adds another decision. A via located directly in a component pad can draw solder away<br \/>\n    from the joint if the hole remains open. Resin filling, copper capping, and planarization prevent<br \/>\n    the pad from behaving like an open drain during soldering.\n  <\/p>\n<h2>Review Copper Geometry as a Manufacturing System<\/h2>\n<p>\n    Trace width and spacing should be checked against the copper construction actually being built.<br \/>\n    More copper requires more material to be etched, which changes the relationship between nominal<br \/>\n    artwork and the finished conductor.\n  <\/p>\n<p>The review should cover:<\/p>\n<ul>\n<li>Minimum trace width<\/li>\n<li>Minimum spacing<\/li>\n<li>Copper-to-board-edge clearance<\/li>\n<li>Annular rings<\/li>\n<li>Copper around slots and cut-outs<\/li>\n<li>Plane neck-downs<\/li>\n<li>Thermal relief geometry<\/li>\n<li>Copper density around fine-pitch regions<\/li>\n<\/ul>\n<p>\n    Annular ring is the copper remaining around a drilled hole after drilling and registration<br \/>\n    variation are considered. A pad can look generous in the CAD view yet become much less forgiving<br \/>\n    once real drill registration enters the process.\n  <\/p>\n<h3>A Local Neck-Down Can Control the Whole Fabrication Decision<\/h3>\n<p>\n    Suppose an eight-layer board is routed mostly at 5 mil trace and 5 mil space, but a single ball<br \/>\n    grid array (BGA) escape uses a 2 mil trace between pads. That small region can become the feature<br \/>\n    that determines whether the artwork, copper construction, imaging process, and yield assumptions<br \/>\n    still make sense.\n  <\/p>\n<p>\n    The lesson is not to avoid fine geometry. It is to mark where it exists and verify that it is<br \/>\n    intentional.\n  <\/p>\n<p>\n    A manufacturing review should distinguish a board that is consistently moderate in geometry from<br \/>\n    one that contains a few local density peaks.\n  <\/p>\n<h2>Treat Impedance Notes as Electrical Requirements, Not Drawing Decoration<\/h2>\n<p>\n    Controlled-impedance nets should be linked to an actual stackup. A note such as<br \/>\n    &#8220;50 ohm controlled impedance&#8221; is incomplete if the manufacturer cannot determine which signals,<br \/>\n    layers, structures, and reference planes it applies to.\n  <\/p>\n<p>For each controlled structure, provide:<\/p>\n<ol>\n<li>Target impedance.<\/li>\n<li>Single-ended or differential construction.<\/li>\n<li>Applicable signal layers.<\/li>\n<li>Reference plane.<\/li>\n<li>Relevant net classes where practical.<\/li>\n<li>Any required verification documentation.<\/li>\n<\/ol>\n<p>\n    Time-domain reflectometry (TDR) measures impedance along a test structure by observing reflections<br \/>\n    from a fast electrical transition. Coupon testing is useful because the coupon can reproduce the<br \/>\n    same fabrication construction without probing production traces directly.\n  <\/p>\n<p>\n    The layout review should also look beyond the impedance number. A perfectly controlled trace can<br \/>\n    still fail electrically if it crosses a reference-plane discontinuity, changes layers without an<br \/>\n    adequate return path, or reaches a connector through a poorly considered transition.\n  <\/p>\n<h2>Review the PCB Through the Assembly Process<\/h2>\n<p>\n    Bare-board manufacturability is only half of a production review. A printed circuit board that<br \/>\n    fabricates cleanly can still create soldering, inspection, or rework problems after components are<br \/>\n    placed.\n  <\/p>\n<p>Check component footprints against the latest package drawings and verify:<\/p>\n<ul>\n<li>Pad dimensions and orientation<\/li>\n<li>Pin 1 and polarity markings<\/li>\n<li>Courtyard clearance<\/li>\n<li>Connector access<\/li>\n<li>Tall-component interference<\/li>\n<li>Component-to-edge spacing<\/li>\n<li>Tool access for through-hole parts<\/li>\n<li>Thermal-pad construction<\/li>\n<li>Fiducials where required by the assembly process<\/li>\n<li>Test-point accessibility<\/li>\n<\/ul>\n<p>\n    Pay particular attention to bottom-terminated packages such as quad flat no-lead (QFN), land grid<br \/>\n    array (LGA), and BGA devices. Their solder joints cannot all be evaluated from an external visual<br \/>\n    inspection.\n  <\/p>\n<p>\n    Production inspection can therefore involve solder paste inspection before reflow, automated<br \/>\n    optical inspection after reflow, and X-ray inspection for hidden joints.\n  <\/p>\n<h3>Surface Finish Affects the Assembly Decision<\/h3>\n<p>\n    Do not select surface finish as a fabrication-only preference.\n  <\/p>\n<p>\n    Pad flatness matters for fine-pitch parts. Contact areas such as edge fingers have different wear<br \/>\n    requirements from solderable component pads. Wire-bonding applications create another set of<br \/>\n    requirements.\n  <\/p>\n<p>\n    The review should therefore connect surface finish to component pitch, soldering process, contact<br \/>\n    function, expected handling, and any bonding operation before the fabrication drawing is released.\n  <\/p>\n<h2>Verify the BOM Before It Becomes a Production Problem<\/h2>\n<p>\n    The bill of materials (BOM) should identify what can actually be purchased, not merely what<br \/>\n    existed when the schematic was drawn.\n  <\/p>\n<p>Review each production item for:<\/p>\n<ul>\n<li>Manufacturer name<\/li>\n<li>Manufacturer part number<\/li>\n<li>Approved substitutions<\/li>\n<li>Quantity per board<\/li>\n<li>Package<\/li>\n<li>Reference designators<\/li>\n<li>Do-not-fit status<\/li>\n<li>Customer-supplied parts<\/li>\n<li>Parts that require programming or serialization<\/li>\n<\/ul>\n<p>\n    Do not use descriptions such as &#8220;10 k resistor, 0603&#8221; as the sole procurement definition when<br \/>\n    electrical tolerance, power rating, temperature coefficient, voltage rating, or another parameter<br \/>\n    matters.\n  <\/p>\n<p>\n    Lifecycle status should also be checked before the first production order. A board can pass<br \/>\n    electrical review and still stall because one device has become unavailable.\n  <\/p>\n<p>\n    Alternative sourcing introduces another production consideration: authenticity. Parts sourced<br \/>\n    outside normal authorized channels may require packaging inspection, lot verification, X-ray,<br \/>\n    electrical testing, or further authentication depending on the sourcing risk.\n  <\/p>\n<h2>Design Test Access Before the Layout Is Locked<\/h2>\n<p>\n    Electrical test should influence layout while pads and probe access can still move.\n  <\/p>\n<p>\n    For a bare PCB, flying-probe testing can check network connectivity without a dedicated fixture.<br \/>\n    At production volume, fixture-based testing may make sense. After assembly, functional test can<br \/>\n    verify behaviour that continuity testing cannot.\n  <\/p>\n<p>Ask before release:<\/p>\n<ul>\n<li>Which nets must be electrically accessible?<\/li>\n<li>Will the board use flying probe, fixture-based in-circuit test, functional test, or a combination?<\/li>\n<li>Do programmed devices require JTAG, SWD, ISP, or another interface?<\/li>\n<li>Does the test process need dedicated power, ground, reset, or communication access?<\/li>\n<li>Will serial numbers, MAC addresses, or firmware versions be logged?<\/li>\n<\/ul>\n<p>\n    A test point added after routing is finished often forces a compromise. One planned before routing<br \/>\n    can be treated as part of the circuit.\n  <\/p>\n<h2>Run a File-to-File Consistency Check<\/h2>\n<p>\n    Many production errors are not layout errors. They are disagreement errors between otherwise<br \/>\n    valid files.\n  <\/p>\n<p>The final manufacturing package may include:<\/p>\n<ul>\n<li>Gerber RS-274X, ODB++, or IPC-2581 fabrication data<\/li>\n<li>NC drill data<\/li>\n<li>Stackup documentation<\/li>\n<li>Impedance requirements<\/li>\n<li>Fabrication notes<\/li>\n<li>BOM<\/li>\n<li>Pick-and-place or centroid data<\/li>\n<li>Assembly drawing<\/li>\n<li>Relevant design-source files where required<\/li>\n<\/ul>\n<p>\n    Compare these files against one another rather than approving them independently.\n  <\/p>\n<p>\n    If R17 is rotated 180 degrees in the centroid file but appears correctly on the assembly drawing,<br \/>\n    one file is wrong. If the fabrication drawing calls the board 1.6 mm thick while the approved<br \/>\n    stackup totals to a different finished construction, production needs the conflict resolved rather<br \/>\n    than guessed.\n  <\/p>\n<p>\n    Revision control should be equally explicit. The BOM, placement data, fabrication files, drawings,<br \/>\n    and firmware package should all describe the same released product state.\n  <\/p>\n<h2>Use a First Article to Validate the Production Package<\/h2>\n<p>\n    A first article inspection (FAI) is the controlled review of the first build against the released<br \/>\n    requirements before the remaining production lot is released.\n  <\/p>\n<p>\n    It is most useful when the approval criteria are decided before the board arrives.\n  <\/p>\n<p>For a new assembly, that review can connect:<\/p>\n<ul>\n<li>Fabricated dimensions<\/li>\n<li>Component identity and orientation<\/li>\n<li>Solder workmanship<\/li>\n<li>Hidden-joint X-ray where applicable<\/li>\n<li>Programming<\/li>\n<li>Electrical or functional test<\/li>\n<li>Serialization<\/li>\n<li>Mechanical fit<\/li>\n<\/ul>\n<p>\n    The first article is not a replacement for design review. Its job is to confirm that the released<br \/>\n    data produces the intended hardware.\n  <\/p>\n<p>\n    Finding a reversed connector in CAD costs far less disruption than finding it after fabricated<br \/>\n    boards, purchased components, stencils, programming, and production scheduling are already tied<br \/>\n    to the released revision.\n  <\/p>\n<h2>Production Release Checklist<\/h2>\n<p>\n    Before authorizing production, confirm that the answers to these questions are explicit:\n  <\/p>\n<table>\n<thead>\n<tr>\n<th>Review Area<\/th>\n<th>Release Question<\/th>\n<th>What a Miss Can Cause<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Stackup<\/td>\n<td>Is the layer construction frozen and consistent with the layout?<\/td>\n<td>Impedance, thickness, routing or fabrication changes<\/td>\n<\/tr>\n<tr>\n<td>Drilling<\/td>\n<td>Have hole diameters, plating and depth been reviewed together?<\/td>\n<td>Plating difficulty, fit issues or redesign<\/td>\n<\/tr>\n<tr>\n<td>Vias<\/td>\n<td>Are blind, buried, microvia and via-in-pad structures fully defined?<\/td>\n<td>Lamination changes or soldering problems<\/td>\n<\/tr>\n<tr>\n<td>Copper<\/td>\n<td>Are minimum trace, spacing, annular ring and edge conditions intentional?<\/td>\n<td>Fabrication rejection or reduced process margin<\/td>\n<\/tr>\n<tr>\n<td>Impedance<\/td>\n<td>Are target nets, layers and reference structures identified?<\/td>\n<td>Incorrect transmission-line construction<\/td>\n<\/tr>\n<tr>\n<td>Assembly<\/td>\n<td>Do footprints, polarity, spacing and access match the real components?<\/td>\n<td>Placement, soldering, inspection or rework failures<\/td>\n<\/tr>\n<tr>\n<td>Finish<\/td>\n<td>Does the surface finish suit the assembly and contact requirements?<\/td>\n<td>Solderability or interface problems<\/td>\n<\/tr>\n<tr>\n<td>BOM<\/td>\n<td>Are manufacturer part numbers and approved alternatives controlled?<\/td>\n<td>Purchasing delays or incorrect substitutions<\/td>\n<\/tr>\n<tr>\n<td>Test<\/td>\n<td>Are required test and programming interfaces accessible?<\/td>\n<td>Expensive manual test or weak fault coverage<\/td>\n<\/tr>\n<tr>\n<td>Files<\/td>\n<td>Do fabrication, BOM, placement and drawings describe one revision?<\/td>\n<td>Production built from conflicting data<\/td>\n<\/tr>\n<tr>\n<td>First article<\/td>\n<td>Are acceptance criteria defined before lot release?<\/td>\n<td>Problems repeated across the production quantity<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h2>Send the Production Package Before the Design Becomes Expensive to Change<\/h2>\n<p>\n    If your circuit board is moving from design release into fabrication and assembly, RLX can review<br \/>\n    the manufacturing package as part of the quote process. Send the fabrication data, BOM,<br \/>\n    pick-and-place file, stackup and assembly documentation together so the <a href=\"https:\/\/rlxsolutions.com\/engineering-design.html\">engineer-reviewed DFM<\/a> can<br \/>\n    evaluate the design as one production package rather than a collection of disconnected files.\n  <\/p>\n<section class=\"faq\">\n<h2>FAQ<\/h2>\n<h3>What files should I send for a PCB design review?<\/h3>\n<p>\n      For fabrication, send the manufacturing data, NC drill files, stackup information, impedance<br \/>\n      requirements and fabrication notes. For an assembled board, include the BOM, pick-and-place or<br \/>\n      centroid data, and assembly drawing as well. Sending the complete revision together makes it<br \/>\n      possible to find conflicts between files before they reach production.\n    <\/p>\n<h3>Should PCB DFM happen before or after routing is complete?<\/h3>\n<p>\n      The most useful review points occur before the design becomes difficult to change and again<br \/>\n      before release. Stackup, via architecture and controlled-impedance planning should be established<br \/>\n      early because they affect routing. The final review then checks the completed artwork, drilling,<br \/>\n      files, assembly data and test requirements as a single production package.\n    <\/p>\n<h3>Why can two PCBs with the same layer count have different manufacturing requirements?<\/h3>\n<p>\n      Layer count does not describe the process sequence. A 10-layer board using ordinary through vias<br \/>\n      can require a different build sequence from a 10-layer board containing blind vias, buried vias<br \/>\n      and stacked microvias. Those features can introduce sequential lamination, laser drilling, via<br \/>\n      filling, capping and additional registration requirements even though both designs have ten<br \/>\n      copper layers.\n    <\/p>\n<h3>Does a PCB design review include assembly issues?<\/h3>\n<p>\n      It should if the board will be populated. Bare-board DFM checks fabrication concerns such as<br \/>\n      stackup, drilling, copper geometry and impedance. DFA extends the review to footprints, polarity,<br \/>\n      component spacing, soldering, hidden-joint inspection, programming, rework and test access.<br \/>\n      Reviewing both reduces the risk that a manufacturable bare board becomes a difficult assembly.\n    <\/p>\n<h3>Why should test points be reviewed before production?<\/h3>\n<p>\n      Test access affects layout. Flying probe, in-circuit test, functional test, programming and<br \/>\n      debugging may each require physical or electrical access to selected nets. If those requirements<br \/>\n      appear after routing is frozen, adding probe pads can disturb routing, clearances or signal<br \/>\n      structures. Defining test strategy earlier allows the necessary access to be designed into the<br \/>\n      board.\n    <\/p>\n<\/section>\n","protected":false},"excerpt":{"rendered":"<p>A PCB design review before production should confirm the stackup, drill plan, copper geometry, impedance targets, component data, assembly clearances, [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":189,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"nf_dc_page":"","site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"footnotes":""},"categories":[19],"tags":[],"class_list":["post-190","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pcb-engineering"],"_links":{"self":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/190","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/comments?post=190"}],"version-history":[{"count":0,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/190\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media\/189"}],"wp:attachment":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media?parent=190"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/categories?post=190"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/tags?post=190"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}