{"id":268,"date":"2026-08-08T09:00:00","date_gmt":"2026-08-08T09:00:00","guid":{"rendered":"https:\/\/rlxsolutions.com\/blog\/creepage-vs-clearance-pcb\/"},"modified":"2026-08-08T09:00:00","modified_gmt":"2026-08-08T09:00:00","slug":"creepage-vs-clearance-pcb","status":"publish","type":"post","link":"https:\/\/rlxsolutions.com\/blog\/creepage-vs-clearance-pcb\/","title":{"rendered":"Creepage vs Clearance in PCB Design"},"content":{"rendered":"<p>Creepage is the shortest path between conductors along an insulating surface, while clearance is the shortest distance through air. PCB designers must evaluate both because the limiting path can change with board geometry, voltage, environment and insulation strategy. <a href=\"https:\/\/rlxsolutions.com\/\">RLX Solutions<\/a>, a contract electronics manufacturer in Concord, Ontario, reviews these constraints during <a href=\"https:\/\/rlxsolutions.com\/blog\/pcb-engineering-guide\/\">PCB design<\/a> and fabrication planning.<\/p>\n<h2>Creepage vs clearance: the practical difference<\/h2>\n<p>The distinction sounds simple until the printed circuit board has slots, component bodies, copper on multiple layers and conductors near the board edge.<\/p>\n<p><strong>Clearance measures through air.<\/strong> If two exposed copper features are separated by an unobstructed air gap, the shortest air path between them is the clearance.<\/p>\n<p><strong>Creepage measures along an insulating surface.<\/strong> On a PCB, that normally means tracing the shortest path across the laminate or another insulating surface between conductive features.<\/p>\n<p>Those paths can have different lengths even when they connect the same two electrical nodes.<\/p>\n<table>\n<thead>\n<tr>\n<th>Decision factor<\/th>\n<th>Clearance<\/th>\n<th>Creepage<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Path<\/td>\n<td>Through air<\/td>\n<td>Along an insulating surface<\/td>\n<\/tr>\n<tr>\n<td>Main concern<\/td>\n<td>Electrical breakdown through the air gap<\/td>\n<td>Surface conduction or tracking<\/td>\n<\/tr>\n<tr>\n<td>Geometry sensitivity<\/td>\n<td>Direct conductor-to-conductor distance matters<\/td>\n<td>Surface contour and insulation geometry matter<\/td>\n<\/tr>\n<tr>\n<td>Slot effect<\/td>\n<td>Can alter the available air path<\/td>\n<td>Can lengthen the surface route when correctly designed<\/td>\n<\/tr>\n<tr>\n<td>Environmental sensitivity<\/td>\n<td>Air conditions matter<\/td>\n<td>Surface contamination and material behaviour become significant<\/td>\n<\/tr>\n<tr>\n<td>PCB review<\/td>\n<td>Check actual 3D conductor geometry<\/td>\n<td>Trace the shortest valid surface path<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>This is why simply measuring the distance between two pads in a PCB editor can be misleading. A design rule may measure an X-Y spacing while the governing electrical path follows different geometry.<\/p>\n<h2>Voltage alone does not determine the required spacing<\/h2>\n<p>A voltage value by itself is not enough to choose a creepage or clearance distance.<\/p>\n<p>The applicable product and safety requirements can depend on factors such as working voltage, transient conditions, insulation function, pollution environment, material characteristics and installation conditions. The correct requirement therefore comes from the applicable standard and product architecture, rather than from a universal PCB spacing rule.<\/p>\n<p>This matters during layout because a designer can create a large nominal gap and still leave a shorter path somewhere else.<\/p>\n<p>Consider a hypothetical 4-layer, 1.6 mm circuit board. Two high-potential nets appear to have 5.0 mm separation across the top layer. A plated mounting feature sits between them, however, and its nearest conductive edge reduces the actual path to 2.2 mm.<\/p>\n<p>The original 5.0 mm dimension is no longer the relevant geometry. The engineer has to identify the nearest conductive features and evaluate the actual path between them.<\/p>\n<p>The same principle applies to vias, component leads, connector pins, chassis-connected features and exposed copper. Electrical isolation is a system of paths, not a single layout dimension.<\/p>\n<h2>Creepage follows the surface you actually designed<\/h2>\n<p>Creepage becomes especially interesting when the direct surface route is interrupted.<\/p>\n<p>Imagine two pads separated by 4.0 mm across a flat laminate surface. If the applicable insulation requirement calls for a longer surface path, simply adding solder mask between the pads does not automatically create that distance.<\/p>\n<p>Changing the physical geometry can.<\/p>\n<p>A properly positioned slot can force the relevant surface route to travel around the slot rather than straight across the board. The exact treatment of that geometry still has to follow the applicable safety requirements, including how the slot dimensions and construction are recognized.<\/p>\n<p><strong>Surface treatment changes the material system. Physical geometry changes the path.<\/strong><\/p>\n<p>Those are different engineering actions and should not be treated as interchangeable.<\/p>\n<p>The fabrication consequence also matters. A slot is not just an electrical symbol on a drawing. It becomes a routed or drilled feature with manufacturing constraints, tolerances and copper-to-edge relationships that must be considered during design for manufacturability (DFM).<\/p>\n<p>For PCB fabrication, copper also needs sufficient distance from the finished board or routed feature. That mechanical manufacturing requirement is separate from the electrical creepage requirement. Meeting one does not prove compliance with the other.<\/p>\n<h2>Clearance problems often hide outside the obvious top-layer gap<\/h2>\n<p>Clearance should be evaluated between conductive objects, not just between traces.<\/p>\n<p>That means the nearest points may involve:<\/p>\n<ul>\n<li>Component pads or leads<\/li>\n<li>Vias and plated through-holes<\/li>\n<li>Exposed test points<\/li>\n<li>Connector contacts<\/li>\n<li>Heatsinks or other conductive hardware<\/li>\n<li>Mounting hardware<\/li>\n<li>Board-edge copper<\/li>\n<li>Conductive features on different physical planes<\/li>\n<\/ul>\n<p>A 2D design-rule check is useful, but the engineer still has to understand the assembled geometry.<\/p>\n<h3>Worked example: a connector changes the shortest path<\/h3>\n<p>Take a hypothetical 6-layer PCB with two nets separated by 6.0 mm in the routing area. At first glance, the board appears to have generous isolation.<\/p>\n<p>Now place a connector across that boundary. One pin belongs to the first net and an adjacent exposed contact belongs to the second. Their physical separation is 2.5 mm.<\/p>\n<p>The 6.0 mm trace spacing is no longer the limiting clearance. The connector geometry has introduced a shorter path.<\/p>\n<p>This is one reason safety spacing should be treated as a constraint on the complete assembly rather than something checked only after routing.<\/p>\n<h2>Board A vs Board B: the same layer count can produce very different isolation problems<\/h2>\n<p>Consider two hypothetical 8-layer boards. Both are 1.6 mm thick and use the same layer count.<\/p>\n<table>\n<thead>\n<tr>\n<th>Decision factor<\/th>\n<th>Board A<\/th>\n<th>Board B<\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td>Layer count<\/td>\n<td>8<\/td>\n<td>8<\/td>\n<\/tr>\n<tr>\n<td>Board thickness<\/td>\n<td>1.6 mm<\/td>\n<td>1.6 mm<\/td>\n<\/tr>\n<tr>\n<td>High-voltage boundary<\/td>\n<td>Wide open region<\/td>\n<td>Dense component region<\/td>\n<\/tr>\n<tr>\n<td>Nearest top-layer conductor spacing<\/td>\n<td>6.0 mm<\/td>\n<td>3.0 mm<\/td>\n<\/tr>\n<tr>\n<td>Geometry<\/td>\n<td>Flat surface between domains<\/td>\n<td>Routed isolation slot between domains<\/td>\n<\/tr>\n<tr>\n<td>Via placement<\/td>\n<td>Vias kept away from boundary<\/td>\n<td>Vias close to slot ends<\/td>\n<\/tr>\n<tr>\n<td>Manufacturing implication<\/td>\n<td>Conventional routing around boundary<\/td>\n<td>Slot geometry and copper-to-edge conditions need review<\/td>\n<\/tr>\n<tr>\n<td>Design risk<\/td>\n<td>A later component change can reduce the gap<\/td>\n<td>Slot endpoints or nearby copper can create an unintended short path<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>Board B is not automatically better because it contains an isolation slot. The slot has to interrupt the relevant path without creating another limiting geometry at its ends.<\/p>\n<p>Board A has the simpler fabrication geometry, but its isolation distance consumes more PCB area. That can be acceptable on a large industrial control board and expensive on a compact power design where every square millimetre affects enclosure size.<\/p>\n<p>This is the cost mechanism engineers need to consider. Creepage and clearance requirements can drive board area, routing congestion, connector selection and mechanical packaging before they affect the <a href=\"https:\/\/rlxsolutions.com\/pcb-manufacturing.html\">bare-board fabrication<\/a> process itself.<\/p>\n<h2>Slots can solve one problem and create another<\/h2>\n<p>Isolation slots are useful because they change physical geometry, but they need to be designed as manufactured features.<\/p>\n<p>Suppose a hypothetical 2.0 mm thick board has two conductor groups separated by a routed slot. The designer places copper 0.15 mm from the intended slot boundary.<\/p>\n<p>That creates a fabrication problem before the electrical spacing question is even settled. Copper-to-edge requirements apply to the finished routed geometry, and the slot has positional and dimensional tolerances.<\/p>\n<p>Move that copper farther away and the design becomes less sensitive to routing variation. The electrical engineer must then recalculate the relevant creepage and clearance paths using the finished geometry.<\/p>\n<p>The important distinction is between <strong>nominal CAD geometry<\/strong> and <strong>manufactured geometry<\/strong>. Safety-related spacing should have enough design margin that ordinary fabrication variation does not turn a passing nominal layout into a questionable finished board.<\/p>\n<h2>Do not use solder mask as a substitute for physical spacing<\/h2>\n<p>Solder mask is useful for solder control, conductor protection and assembly manufacturability. It should not casually be treated as equivalent to increasing the physical separation between conductors.<\/p>\n<p>A coating or insulating layer may have a role within a specific insulation system, but that role has to come from the applicable requirements and construction, not from an assumption that covered copper no longer matters.<\/p>\n<p>The same caution applies to conformal coating.<\/p>\n<p>Conformal coating can change the environmental exposure of the assembled PCB, but the engineering decision has to include coating material, coverage, process control and the requirements governing the end product. A nominal coating callout is not a universal permission to collapse spacing.<\/p>\n<p>Manufacturing details become important here. Selective coating can leave keep-out regions around connectors, test points or other features. Those uncoated regions may sit exactly where an engineer expected the coating to support the insulation strategy.<\/p>\n<h2>Material selection matters more to creepage than a simple gap rule suggests<\/h2>\n<p>Creepage is a surface phenomenon, so the insulating material itself can become part of the design decision.<\/p>\n<p>Comparative tracking index (CTI) characterizes an insulating material&#8217;s resistance to electrical tracking under specified test conditions. That makes laminate selection relevant when the governing insulation system considers material grouping.<\/p>\n<p>This creates a procurement consequence that is easy to miss.<\/p>\n<p>If a design&#8217;s safety analysis relies on a particular material characteristic, the fabrication documentation needs to preserve that requirement. Allowing an uncontrolled laminate substitution can undermine the assumptions used when the spacing was established.<\/p>\n<p>The fabrication package should therefore identify safety-relevant material requirements explicitly instead of leaving them buried in an engineer&#8217;s calculation sheet.<\/p>\n<p>That same principle extends beyond laminate. If insulation performance depends on a coating, slot, barrier or mechanical separation, the requirement should survive the handoff from schematic and layout into manufacturing documentation.<\/p>\n<h2>Multilayer boards need a path-based review, not a layer-count rule<\/h2>\n<p>Adding layers does not inherently solve creepage or clearance.<\/p>\n<p>A multilayer stackup can actually make review harder because different conductive features occupy different physical positions. An outer-layer trace may appear safely separated from another outer-layer feature while a via, internal conductor or exposed termination changes the relevant geometry.<\/p>\n<p>Consider a hypothetical 10-layer, 2.0 mm board. A <a href=\"https:\/\/rlxsolutions.com\/blog\/high-voltage-pcb-design\/\">high-voltage<\/a> region occupies Layers 1 through 3, while a secondary circuit uses Layers 4 through 10. A via from Layer 1 to Layer 3 is placed near the isolation boundary.<\/p>\n<p>The designer should not infer isolation merely because the secondary routing begins on Layer 4. The via geometry, conductor locations, dielectric structure, board surfaces and insulation requirements all need to be considered according to the applicable design rules.<\/p>\n<p>This is also where via architecture intersects fabrication. Blind vias require a different build sequence from ordinary through vias, while buried vias sit between inner layers. Changing via type to solve routing congestion can therefore alter both the physical geometry and manufacturing sequence.<\/p>\n<h2>Treat creepage and clearance as placement constraints before routing<\/h2>\n<p>The cheapest point to solve an isolation problem is usually before dense routing locks the geometry.<\/p>\n<p>Start by dividing the board into electrical domains. Place components that cross those domains deliberately, then reserve the required isolation corridors before filling the remaining space.<\/p>\n<ol>\n<li><strong>Identify the electrical boundaries.<\/strong> Mark primary, secondary, protective-earth and other relevant domains according to the product architecture.<\/li>\n<li><strong>Determine the governing requirements.<\/strong> Establish the applicable insulation function and product requirements before assigning PCB spacing.<\/li>\n<li><strong>Place boundary-crossing components.<\/strong> Connectors, isolation components and other interfaces can determine the shortest physical path.<\/li>\n<li><strong>Reserve creepage and clearance corridors.<\/strong> Do this before general routing consumes the available area.<\/li>\n<li><strong>Add slots or barriers deliberately.<\/strong> Treat them as manufactured mechanical features, not graphic objects.<\/li>\n<li><strong>Review every conductor near the boundary.<\/strong> Include pads, vias, holes, test points and conductive hardware.<\/li>\n<li><strong>Check the assembled product.<\/strong> Component bodies, leads, heatsinks, fasteners and enclosure parts can change the shortest path.<\/li>\n<li><strong>Carry the requirements into fabrication documentation.<\/strong> Material, geometry and other safety-relevant constraints should be explicit.<\/li>\n<\/ol>\n<p>This sequence prevents a common late-stage problem: discovering during compliance review that the only way to increase spacing is to move a connector, enlarge the board or redesign a power section.<\/p>\n<h2>Creepage and clearance also affect fabrication economics<\/h2>\n<p>The spacing itself is not necessarily what makes a PCB expensive. The geometry used to preserve it can create the cost.<\/p>\n<p>A wider isolation corridor can increase board dimensions. Slots introduce routing operations and affect panel geometry. Moving components to maintain separation can increase routing density elsewhere, which may then pressure trace width, via architecture or layer count.<\/p>\n<p>For example, suppose a hypothetical power board can be laid out as either 100 \u00d7 80 mm with an open isolation corridor or 92 \u00d7 75 mm by compressing the low-voltage section and adding more complex routing around the boundary.<\/p>\n<p>The smaller outline is not automatically the lower-cost board. If the compact version forces extra layers or more involved via architecture, the fabrication structure has changed even though the board area decreased.<\/p>\n<p>That is why isolation planning belongs near stackup and placement decisions, not at the final design-rule-check stage.<\/p>\n<h2>What your PCB manufacturer needs to review the design<\/h2>\n<p>A manufacturer can check manufacturability only against the information supplied. The electrical engineer remains responsible for defining the product&#8217;s required insulation strategy and applicable compliance requirements.<\/p>\n<p>For a bare PCB review, the fabrication data should make the physical construction unambiguous. Gerber RS-274X, ODB++ or IPC-2581 data can define the board geometry, while NC drill data identifies drilled features. A stackup document and fabrication notes can communicate construction requirements that are not obvious from copper artwork alone.<\/p>\n<p>For an assembled board, the bill of materials (BOM), pick-and-place data and assembly drawing add the component geometry needed for manufacturing planning.<\/p>\n<p>The handoff matters because creepage and clearance failures often begin as information failures. A slot assumed to be safety-relevant but not dimensioned, a material requirement left out of the fabrication notes, or a keep-out that exists only in a designer&#8217;s private calculation can disappear between engineering and production.<\/p>\n<h2>Engineer-reviewed DFM should preserve the insulation intent<\/h2>\n<p><a href=\"https:\/\/rlxsolutions.com\/engineering-design.html\">Design for manufacturability<\/a> should test whether the proposed geometry can actually be produced without undermining the engineer&#8217;s spacing strategy.<\/p>\n<p>That includes looking at routed features, copper near finished edges, drilling, layer construction and other fabrication details that interact with the isolation boundary. For assembly, the review expands to component placement and processes that may affect the physical implementation.<\/p>\n<p>The manufacturer should not be expected to invent the required creepage or clearance value. The design authority defines the requirement. Manufacturing then determines whether the supplied geometry can be built consistently.<\/p>\n<h3>Move from spacing rules to buildable geometry<\/h3>\n<p>If your circuit board is approaching release, RLX can review the fabrication and assembly data as part of the quote process. Send the manufacturing files and, where assembly is involved, the BOM and pick-and-place data so the isolation geometry can be reviewed alongside the rest of the design.<\/p>\n<section class=\"faq\">\n<h2>Frequently Asked Questions<\/h2>\n<h3>Is creepage the same as PCB trace spacing?<\/h3>\n<p>No. Trace spacing is a layout dimension between copper features, while creepage is the relevant path along an insulating surface between conductive parts. A trace-spacing rule can help enforce part of an isolation strategy, but it does not automatically account for slots, board edges, vias, component leads or other geometry that may alter the shortest surface path.<\/p>\n<h3>Does adding an isolation slot increase creepage?<\/h3>\n<p>A correctly positioned slot can increase the relevant surface path by interrupting the direct route across the PCB surface. Its effect depends on the actual geometry and the rules governing the product. The slot also becomes a manufactured feature, so its dimensions, location and relationship to nearby copper need to be reviewed as part of fabrication.<\/p>\n<h3>Can solder mask count toward creepage distance?<\/h3>\n<p>Do not assume that ordinary solder mask lets you reduce physical creepage. Whether an insulating layer affects the required construction depends on the applicable standard and insulation system. From a layout perspective, maintaining the required physical geometry without relying on an unsupported solder-mask assumption produces a clearer manufacturing requirement.<\/p>\n<h3>Does conformal coating reduce required PCB spacing?<\/h3>\n<p>It can be relevant to an insulation system under applicable requirements, but coating is not a universal licence to reduce creepage or clearance. Material, coverage and process control matter. Selective coating also leaves intentionally uncoated areas, so the assembled-board geometry needs to be evaluated rather than assuming that the complete PCB surface receives equivalent insulation.<\/p>\n<h3>What PCB files are useful for a creepage and clearance review?<\/h3>\n<p>For fabrication, provide complete manufacturing data such as Gerber RS-274X, ODB++ or IPC-2581 files, NC drill data, the stackup and relevant fabrication notes. For assembly review, add the BOM, pick-and-place data and assembly drawing. Safety-relevant material or geometry requirements should be explicit rather than left as assumptions.<\/p>\n<\/section>\n","protected":false},"excerpt":{"rendered":"<p>Creepage is the shortest path between conductors along an insulating surface, while clearance is the shortest distance through air. PCB [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":267,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"nf_dc_page":"","site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"footnotes":""},"categories":[19],"tags":[],"class_list":["post-268","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-pcb-engineering"],"_links":{"self":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/268","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/comments?post=268"}],"version-history":[{"count":0,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/posts\/268\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media\/267"}],"wp:attachment":[{"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/media?parent=268"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/categories?post=268"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/rlxsolutions.com\/blog\/wp-json\/wp\/v2\/tags?post=268"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}