High-voltage PCB design requires separate control of clearance through air, creepage across insulating surfaces and isolation through solid dielectric. The correct dimensions depend on electrical stress, environment, material and the governing product standard. RLX Solutions, a contract electronics manufacturer in Concord, Ontario, reviews these constraints against the proposed circuit board stackup before fabrication.
Creepage and clearance protect against different failure mechanisms
Treating creepage and clearance as two names for trace spacing is a design error. They address different physical failure mechanisms, so a printed circuit board can satisfy one requirement while failing the other.
Clearance is the shortest distance through air between two conductive parts. Its purpose is to prevent flashover or arcing when the electric field across that air gap becomes too high.
Creepage is the shortest path along an insulating surface between conductive parts. It addresses surface tracking, where contamination, moisture and electrical stress can progressively create a conductive path across the board.
Solid insulation is the dielectric material separating conductors through the PCB stackup, component package or another insulating structure. It introduces a third path that must be considered independently of surface and air spacing.
| Design parameter | Path being controlled | Primary concern | Important inputs |
|---|---|---|---|
| Clearance | Through air | Flashover and arcing | Transient stress, peak voltage, altitude, insulation requirement |
| Creepage | Along an insulating surface | Surface tracking | Working voltage, pollution degree, material tracking resistance |
| Solid insulation | Through dielectric | Dielectric breakdown | Material system, thickness, construction, electrical stress |
The distinction changes layout decisions. Moving two pads farther apart may improve both creepage and clearance. Cutting a slot between them can change the available surface path much more dramatically than the direct air path. Adding another internal dielectric layer changes neither external measurement in the same way.
That is why a single CAD spacing rule cannot represent the entire isolation system.
Start with the insulation requirement, not a millimetre value
A high-voltage layout should not begin with a rule such as “keep high voltage 5 mm away from everything.” The spacing requirement is an output of insulation coordination, not an arbitrary design preference.
Before setting PCB design rules, establish:
- The working voltage across each isolation boundary.
- The transient or impulse stress that boundary may experience.
- Whether the barrier provides functional, basic or reinforced insulation.
- The applicable end-equipment safety standard.
- The pollution degree at the insulation location.
- The Comparative Tracking Index (CTI) or material group of the insulating material.
- The maximum operating altitude.
- Whether coating, encapsulation, slots or physical barriers form part of the approved insulation system.
Working voltage is the sustained electrical stress across the insulation during normal operation. It is not necessarily the largest voltage printed on the system block diagram.
Consider a 12-layer board containing a 400 V DC bus and isolated 24 V control circuitry. The relevant voltage for one barrier is the actual potential difference across that barrier. A separate 400 V-to-ground spacing problem elsewhere on the same PCB can have different requirements.
This distinction matters because over-design consumes routing area, while under-design can force a board respin when safety review reaches the physical layout.
Clearance follows the shortest real path through air
Clearance must be evaluated geometrically, not just by measuring trace-to-trace spacing in the PCB editor.
Imagine two exposed copper pads separated by an isolation boundary. The direct line through air between the closest conductive points is the clearance path. Pads, vias, component leads, heatsinks, mounting hardware and other conductive features can all become the endpoints of that measurement.
A layout can therefore appear generous in 2D while a component footprint creates the limiting gap.
Transient voltage is particularly relevant because an air gap can withstand normal operating voltage yet flash over during an impulse. Altitude also matters because reduced atmospheric pressure changes the insulating behaviour of air.
For equipment expected to operate at elevated altitude, the altitude requirement belongs in the design inputs before placement freezes. Discovering it during compliance testing can mean moving components, changing packages or increasing the board outline.
Check the entire barrier, not just the obvious traces
An isolation boundary should be treated as a continuous geometric feature.
If a primary-to-secondary barrier crosses 70 mm of board, inspect every feature along those 70 mm. A wide gap beneath an isolation transformer does not compensate for one via, mounting hole or copper pour that approaches the opposite side elsewhere.
Internal copper deserves the same attention. Ground and power planes can quietly cross beneath a barrier that looks correct on the outer layers. Copper keepouts should therefore be applied to every relevant layer rather than only to visible routing.
Creepage depends on the surface the current can follow
Creepage becomes a different problem because the board surface is part of the insulation system.
Dust, moisture, ionic residue and other contaminants can reduce surface resistance. Leakage current can then develop along the surface. Under sufficient electrical stress, repeated local discharge can damage the insulating path and eventually form a conductive track.
Material selection therefore enters the creepage calculation through CTI. CTI characterizes resistance to electrical tracking under defined test conditions. A higher tracking-resistance material can support a different insulation design from a material with poorer tracking behaviour, subject to the applicable standard.
PCB material options are available with CTI ratings of 175 V, 250 V and 600 V. The important design action is to put the required CTI or material requirement in the fabrication documentation rather than allowing laminate substitution to become an uncontrolled variable.
A high-voltage design that depends on a particular material group should not communicate only “FR-4” to purchasing or fabrication. FR-4 describes a broad material family, not the complete electrical insulation requirement.
Isolation slots can recover creepage without simply enlarging the board
A routed slot changes the geometry of the insulating surface. Instead of following a short path directly across the top surface, the creepage path may have to travel around the slot geometry.
That makes slots useful when creepage controls component placement.
But the slot does not make the isolation problem disappear. You still need to evaluate the remaining clearance through air, slot geometry, mechanical strength, fabrication method and every conductor around the opening.
Worked example: a slot changes the routing problem
Consider a hypothetical 6-layer, 1.6 mm board with a high-voltage region on the left and low-voltage control circuitry on the right. Assume the product-level insulation analysis has already established the required creepage and clearance values.
Without a slot, the surface path between the nearest two pads follows the top surface directly. If the available geometry cannot meet the required creepage, the designer may have to move the components farther apart.
Now introduce a routed isolation slot between the same pads. The direct surface route is interrupted, allowing the creepage path to follow the slot boundary instead.
The manufacturing consequence is immediate. Copper must remain clear of the routed feature, the slot has to be represented unambiguously in the fabrication data, and its position tolerance has to be considered when evaluating the finished board. If the slot passes near pads or vias, nominal CAD geometry alone is not enough.
Slots are therefore best designed into the board architecture early. Adding them after routing can collide with planes, return paths, mounting structures or component bodies.
Keep high-voltage isolation intact through every PCB layer
An external isolation boundary can be defeated by internal copper.
Suppose an 8-layer board has high-voltage switching circuitry on Layer 1 and low-voltage logic nearby. The top-layer copper is separated cleanly, but a ground plane on Layer 2 extends underneath both regions. The visual separation on Layer 1 no longer represents the intended electrical architecture.
The correct approach is to define the barrier across the stackup.
- Copper pours on every signal and plane layer.
- Plated and non-plated holes near the barrier.
- Via locations and annular rings.
- Internal plane edges.
- Component pads and exposed metal.
- Board-edge copper.
- Slots and cutouts.
- Solid dielectric between conductors on different layers.
Through-board insulation is not creepage or clearance. If two conductors overlap on different layers, their separation is through solid dielectric. That brings stackup construction and dielectric thickness into the insulation analysis.
The fabricator therefore needs more than Gerbers when the stackup itself carries an electrical insulation requirement. Stackup information and relevant fabrication notes should make the intended construction clear.
Board A vs. Board B: the same layer count can have very different manufacturing cost
Layer count alone says little about the manufacturing burden of a high-voltage PCB.
Consider two hypothetical 10-layer, 2.0 mm circuit boards of identical outline dimensions.
| Decision factor | Board A | Board B |
|---|---|---|
| Layer count | 10 | 10 |
| Board thickness | 2.0 mm | 2.0 mm |
| Via architecture | Through vias | Through vias plus Layer 1 to Layer 2 microvias |
| High-voltage geometry | Open surface spacing | Routed isolation slots |
| Material requirement | General specified laminate | Specified CTI requirement |
| Isolation boundary | Outer-layer spacing | Keepout controlled across all 10 layers |
| Fabrication burden | Conventional drilling and lamination | Laser drilling, added via processing, slot routing and tighter material control |
Board B can cost more even though the purchasing spreadsheet describes both as “10-layer PCBs.”
Its microvias add laser drilling and associated processing. Its isolation slots add routing operations and geometry that must survive fabrication tolerances. Its CTI requirement constrains laminate selection. Its multilayer isolation keepout reduces routing freedom and can force a more deliberate stackup.
This is the useful cost lesson for high-voltage boards: price follows process content and controlled requirements, not simply layer count.
If Board A can satisfy the electrical and safety requirements without HDI structures, adding microvias to Board B purely to recover routing density may solve one layout problem while creating a more involved fabrication flow.
Component packages can become the limiting isolation feature
PCB spacing cannot compensate for a component whose package geometry is the shortest path across the barrier.
An isolated gate driver, transformer, optocoupler, relay or connector may physically bridge the same boundary you have carefully maintained in copper. Package creepage, pin spacing and insulation rating therefore belong in the component-selection process.
Consider a hypothetical isolated interface on a 4-layer board. The PCB layout provides a 9 mm copper-free corridor between primary and secondary regions, but the selected component package creates a shorter external path between conductive terminals.
The board-level 9 mm corridor does not enlarge the component.
The opposite problem also occurs. A component may have suitable isolation characteristics, while copper pours underneath it narrow the effective PCB barrier. Component qualification and PCB geometry have to work as one insulation system.
This becomes particularly important when engineers replace a component during a shortage. A pin-compatible substitute is not automatically isolation-equivalent.
Solder mask and conformal coating are not automatic spacing credits
Solder mask should not be treated as a universal substitute for creepage or clearance.
Its presence changes the physical surface, but whether a coating can alter the required insulation treatment depends on the applicable standard, coating system, environmental assumptions and qualification method. The same caution applies to conformal coating.
From a manufacturing perspective, coating introduces additional questions: where coating is allowed, which areas must remain uncoated, whether connectors or test points require masking, and how coverage will be inspected.
Acrylic, silicone, polyurethane and parylene conformal coating can all be applied to assembled boards. Selective or full-board application is possible, but the design documentation still needs to state the intended coating boundaries.
Do not solve an inadequate isolation layout by drawing a coating note over it at release. Determine first whether the applicable product requirements permit the coating system to play the insulation role you intend.
High-voltage stackup decisions start with voltage and material, not routing density
Stackup design affects more than controlled impedance.
High-voltage boards may need to balance insulation, copper weight, thermal behaviour, routing density and mechanical construction. A power layer carrying substantial current can also need heavier copper, which changes etching geometry and spacing behaviour.
The fabrication envelope includes FR-4 Tg options of 135°C, 150°C, 170°C and 180°C, along with halogen-free materials and several high-frequency laminate families. Outer-layer copper can range through 0.5, 1, 2 and 3 oz in standard construction, with heavier copper available where the design requires it.
Those choices interact.
A high-voltage power board using 3 oz outer copper does not inherit the same fine-line geometry as a 1 oz signal board. If you increase copper weight after layout to address current or thermal requirements, conductor geometry may need to change as well.
This is why the stackup, copper weights, isolation boundary and electrical requirements should be reviewed together rather than released as separate purchasing notes.
Design the barrier before placement locks the board outline
Isolation becomes expensive when it is treated as a final design-rule check.
Start by drawing the electrical boundaries before detailed component placement. Mark which nets belong on each side and identify every legitimate crossing: transformer, isolator, safety-rated capacitor or another approved component.
Then build CAD constraints around that architecture.
For a hypothetical 8-layer power converter, you might reserve a continuous isolation corridor from the top edge to the bottom edge of the board. Layers 1 through 8 inherit the keepout. A transformer crosses the boundary near the centre, while an isolated communications device crosses it near one edge. No unrelated signal, copper pour or stitching via is allowed to cross.
This approach prevents a common late-stage problem: the outer layers satisfy the intended barrier, but buried routing has already occupied the region needed for isolation.
It also makes design review faster because the reviewer can trace one explicit boundary instead of reconstructing the designer’s intent from individual spacing measurements.
Give the manufacturer enough information to preserve the isolation design
High-voltage intent can be lost between PCB layout and fabrication if the manufacturing package does not communicate the controlled variables.
For fabrication, useful release data can include Gerber RS-274X, ODB++, IPC-2581 or NC drill files, the stackup and relevant fabrication notes. If impedance is also controlled, include the impedance targets.
For assembled boards, the bill of materials (BOM), pick-and-place data and assembly drawing add the component-level definition.
The engineering documentation should identify requirements such as controlled laminate characteristics, copper weights, intentional slots and other construction features that affect the insulation system. Do not rely on a screenshot or an email description to carry a requirement that determines product safety.
An engineer-reviewed design for manufacturability (DFM) review is particularly useful here because the question is not simply whether the CAD file can be fabricated. It is whether the fabricated geometry will preserve the electrical intent after drill, routing, registration and material constraints are applied.
Inspection and test must follow the isolation architecture
High-voltage design does not end when the bare PCB passes incoming inspection.
Assembly can introduce solder, contamination, misplaced components or other conditions that affect the finished geometry. Automated optical inspection (AOI), manual visual inspection and X-ray inspection each address different assembly features, while electrical and functional testing address different failure classes.
A first article is especially valuable on a new high-voltage build because it gives the engineer a physical unit to compare against the released design before the production lot proceeds.
The test strategy should come from the product requirement. If a programme requires a particular dielectric, insulation-resistance or functional test, define that requirement rather than assuming standard PCB electrical testing proves the finished product’s isolation performance.
Bare-board net testing and product-level insulation validation answer different questions.
Put creepage, clearance and isolation into the design review
The most effective review asks whether the complete isolation system still works after manufacturing realities are included.
Check the shortest air path, the shortest surface path and the relevant solid-insulation paths. Then repeat the exercise around component bodies, pins, slots, vias, mounting hardware, board edges and internal planes.
For high-voltage PCB design, the useful question is not “What spacing does this voltage need?” It is “What insulation system does this product require under its actual electrical and environmental conditions?”
That question produces the inputs a PCB designer can implement and a manufacturer can preserve.
Engineering review before fabrication
If you are preparing a high-voltage printed circuit board for prototype or production, RLX can review the stackup, isolation geometry, material requirements and fabrication package as part of the design and DFM process. Send the design files with the electrical and product-level constraints that govern the isolation boundary so those requirements can be checked before the board reaches fabrication.
Frequently Asked Questions
What is the difference between PCB creepage and clearance?
Clearance is the shortest path through air between conductive parts, while creepage is the shortest path along an insulating surface. Clearance primarily addresses air breakdown and flashover. Creepage addresses surface tracking under electrical and environmental stress. Because the mechanisms differ, both distances must be evaluated rather than using one generic conductor-spacing rule.
Does an isolation slot increase creepage on a PCB?
A correctly designed slot can increase the available surface path between conductors by interrupting the direct path across the board. Whether and how that geometry counts toward the required insulation distance depends on the applicable product standard and slot construction. The remaining through-air clearance must still be evaluated independently.
Does higher-CTI PCB material help with high-voltage design?
CTI indicates a material’s resistance to surface tracking under defined test conditions. Material group is one of the inputs used when creepage requirements are established under applicable insulation-coordination rules. If your design depends on a particular CTI, specify that requirement in the fabrication documentation so material substitution does not change a controlled electrical property.
Can solder mask replace creepage distance?
Do not assume ordinary solder mask automatically provides a spacing reduction. Whether a coating can form part of an insulation system depends on the governing standard, coating construction and qualification conditions. Design the required insulation architecture first, then determine whether the specified coating process can legitimately affect that requirement.
Should high-voltage keepouts apply to internal PCB layers?
Where an isolation boundary requires internal copper separation, the keepout should be reflected on every affected layer. A clean gap on the top layer can be undermined by an internal plane, trace or via extending across the intended boundary. Solid insulation between overlapping conductors is also a separate design consideration tied to the stackup.
What files should I send for a high-voltage PCB design review?
Provide the native design data where available, plus the fabrication package, stackup, relevant fabrication notes and electrical constraints governing the isolation boundaries. Manufacturing formats can include Gerber RS-274X, ODB++, IPC-2581 and NC drill data. For assembly work, include the BOM, pick-and-place data and assembly drawing as well.
