Industrial PCB manufacturing works best when design, bare-board fabrication, component sourcing, assembly and test are treated as one production system rather than separate purchases. RLX Solutions, a contract electronics manufacturer in Concord, Ontario, reviews those interactions before a circuit board moves from engineering files into production.
An industrial printed circuit board (PCB) must survive more than fabrication. Pad geometry affects soldering. Via architecture changes the lamination sequence. Component choices affect sourcing risk. Test access determines whether faults can be isolated economically. Decisions made in layout can therefore appear later as fabrication cost, assembly defects or production delays. For other sectors, see our guide to PCB applications by industry.
Start industrial PCB manufacturing before the Gerbers are finished
A fabrication drawing cannot correct a stackup that was developed without considering drill geometry, copper weight, impedance or assembly density.
The manufacturing path starts with the electrical and mechanical requirements. Engineers translate those requirements into a stackup, routing architecture, via strategy, component package selection and fabrication specification. Design for manufacturability (DFM) then asks whether the proposed board can be produced repeatably without changing its electrical intent.
For industrial electronics, the design package commonly needs to resolve four connected questions:
- Can the bare PCB be fabricated as drawn? Layer count, material, copper, trace geometry, drill sizes, aspect ratios and surface finish all matter.
- Can the components be assembled with a stable process? Package pitch, pad design, solder paste deposition and thermal behaviour affect the assembly line.
- Can the finished board be inspected and tested? Inspection access and electrical test strategy should exist before production tooling is committed.
- Can the same product be built again? Component identity, fabrication data, revisions and test records need controlled documentation.
A bare PCB is the fabricated circuit board before components are placed. PCB assembly turns that bare board into the populated electronic assembly. Treating these as connected engineering stages reduces the chance that a fabrication decision creates an assembly problem later. Related reading: Medical Electronics & PCB Manufacturing Guide.
Build the stackup around electrical requirements and drill geometry
Layer count alone says little about manufacturing difficulty. A 10-layer board using conventional plated through-holes can follow a very different process from another 10-layer board containing blind vias, buried vias and stacked microvias.
The stackup establishes copper distribution, dielectric relationships, reference planes and the physical path a drilled feature must cross. That is why via architecture should be fixed with the stackup rather than added after routing.
Through-hole plated vias can connect the full board thickness. Blind vias terminate before reaching the opposite surface. Buried vias connect inner layers without reaching either outside surface. Microvias use laser drilling for short interconnections, often as part of a high-density interconnect (HDI) structure.
For a 1.6 mm finished board with a 0.20 mm drilled through-hole, the nominal depth-to-diameter relationship is 8:1. Reduce the hole to 0.15 mm across the same thickness and that relationship becomes about 10.7:1. The smaller hole may save routing area, but it also makes plating through the barrel more demanding.
That geometric relationship is the via aspect ratio: board or dielectric thickness divided by the relevant drilled-hole diameter. It is a manufacturing variable, not simply a CAD setting.
Worked example: same layer count, different production paths
Consider two hypothetical 10-layer industrial control boards.
| Decision factor | Board A | Board B |
|---|---|---|
| Layer count | 10 | 10 |
| Finished thickness | 1.6 mm | 1.6 mm |
| Main via structure | Through vias | Layer 1 to 2 microvias, Layer 2 to 3 microvias and buried vias |
| Smallest example hole | 0.20 mm mechanical | 0.10 mm laser microvia |
| Lamination strategy | Conventional multilayer construction | Sequential lamination |
| Via fill requirement | No via-in-pad fill assumed | Filled and capped structures at dense pads |
| Main manufacturing driver | Through-hole drilling and plating | Added lamination, laser drilling, filling, plating and registration |
Board B does not become more difficult because it has 10 layers. It becomes more difficult because individual interconnections can no longer be produced in one conventional drill-and-plate sequence.
If a Layer 1 pad must connect to Layer 3 through stacked microvias, the fabricator has to build those connections as part of the lamination sequence. If the vias sit inside component pads, resin filling, copper capping and planarization may also be needed so the assembly surface remains suitable for solder paste and component placement.
That extra process path is why two boards with the same outline and layer count can carry very different manufacturing cost and schedule risk.
Route copper with the finished copper thickness in mind
Trace width and spacing cannot be separated from copper weight.
More copper means more material must be removed during etching. As copper thickness rises, holding very small gaps becomes harder because etching progresses laterally as well as vertically. A layout that is comfortable at one copper weight may therefore require wider geometry at another.
For example, a hypothetical two-layer controller may route digital signals at 3 mil trace and 3 mil space with 1 oz copper. If the same board is changed to 2 oz copper for higher-current paths, retaining the same fine geometry creates a different fabrication problem. One approach is to widen all routing where possible. Another is to localize heavier-current requirements instead of making every conductor carry the penalty.
Copper distribution also matters. Large uninterrupted copper regions opposite sparse routing can influence etching and lamination behaviour. The fabrication data should therefore be reviewed as a physical copper pattern rather than only as a logical netlist.
Keep copper away from the routed board edge as specified by the fabrication rules. Features placed too close to the final profile can lose mechanical margin during routing or depanelization.
Controlled impedance starts with the actual stackup
Controlled impedance is produced by geometry and materials together.
A 50-ohm transmission line is not created merely by labelling a net “50 ohm” in the schematic or layout. Trace width, copper thickness, dielectric thickness and laminate properties determine the resulting impedance. The stackup therefore needs to be resolved before final controlled-impedance widths are frozen.
For high-speed industrial products, this becomes significant on interfaces such as Ethernet, USB, PCIe, SerDes and DDR memory connections.
A manufacturing coupon gives the fabricator a representative structure that can be measured using time-domain reflectometry (TDR). That measurement connects the drawing requirement to the manufactured stackup rather than assuming nominal material values produced the desired result.
The engineering consequence is straightforward: do not release a controlled-impedance PCB with an ambiguous stackup and expect the fabrication house to solve the electrical design independently.
Surface finish is both a fabrication and assembly decision
The copper finish protects exposed pads and creates the surface that receives solder, a connector contact or a bonded wire.
Common choices include hot air solder levelling (HASL), electroless nickel immersion gold (ENIG), electroless nickel electroless palladium immersion gold (ENEPIG), immersion silver, immersion tin, organic solderability preservative (OSP) and hard gold for contact areas.
The assembly process narrows the choice.
Fine-pitch components benefit from flat pad surfaces. Edge contacts impose different wear requirements from solder joints. Wire bonding introduces another set of metallurgical considerations. A board that will experience a particular reflow profile or storage interval may also favour one finish over another.
This means finish selection should appear in the design review rather than being treated as a purchasing substitution after Gerber release.
Via-in-pad changes what happens at the assembly surface
Via-in-pad can recover routing space beneath dense ball grid array (BGA) and similar packages, but an untreated hole inside a solderable pad creates a path into which molten solder can move.
Filled and capped via-in-pad addresses that mechanism. The via is filled, capped with copper and planarized so the pad presents a substantially continuous surface to the stencil, solder paste and component terminal.
This process becomes closely connected to microvia architecture. A layout may use a 0.10 mm laser-drilled via directly in a BGA pad because conventional fanout cannot escape the package pitch. That solves routing density, but it creates additional fabrication operations before assembly starts.
The design question is therefore not simply, “Can a via fit in this pad?” It is whether the routing advantage justifies the fill, cap, planarization and HDI process sequence required to produce the pad correctly.
Component sourcing belongs inside the production plan
A complete PCB manufacturing plan must deal with the bill of materials (BOM) as carefully as the Gerber data.
Turnkey assembly places component procurement with the manufacturer. A kitted or partial-turnkey model leaves selected components with the customer while the manufacturer sources the remainder. A consigned build uses a customer-supplied kit.
The choice changes more than purchasing responsibility.
A long-lead integrated circuit can hold an otherwise completed production plan. An end-of-life part can trigger redesign. A component purchased through an independent channel may require additional authenticity verification before it is released to assembly.
Counterfeit-risk control can include source vetting, packaging and date-code inspection, visual inspection, lot verification, X-ray analysis and electrical testing. Higher-risk material may justify destructive analysis through a qualified testing path.
The engineering file set should also identify manufacturer part numbers clearly. A vague BOM description such as “10 µF capacitor” transfers an uncontrolled design decision into purchasing. Package, voltage rating, dielectric, tolerance and approved manufacturer information may all affect whether an apparent substitute is actually equivalent.
Assembly quality begins with solder paste
Surface-mount assembly usually exposes problems in a predictable sequence.
Solder paste is printed first. If paste volume, location or aperture behaviour is wrong, placement accuracy cannot repair the joint. Solder paste inspection (SPI) therefore checks the deposit before reflow.
Components are then placed and the board passes through reflow. Automated optical inspection (AOI) can identify visible placement and solder-joint defects after reflow, while X-ray inspection is needed where the joint is hidden beneath packages such as BGAs, land grid arrays (LGAs) and quad flat no-lead (QFN) devices.
Worked example: a fine-pitch assembly decision
Take a hypothetical six-layer industrial sensor board using a 0.5 mm-pitch BGA. The board is 1.2 mm thick and the package requires routing that cannot escape through conventional dog-bone fanout.
One layout option uses larger mechanical vias outside the pad field, forcing several signals onto longer escape paths. A second option places 0.10 mm laser microvias inside selected pads and connects Layer 1 to Layer 2.
The second option may improve routing density and shorten critical connections, but it changes both fabrication and inspection planning. The microvias need the appropriate fill and cap structure, the assembly process must deposit solder onto planar pads, and the resulting BGA joints are hidden from optical inspection, which makes X-ray relevant.
The failure chain crosses three departments. Poor via processing can alter the pad surface. Poor paste deposition can reduce solder volume. A hidden joint defect may then escape visual inspection. That is why the via, stencil and inspection strategy should be reviewed as one system.
Class 2 and Class 3 affect how the build is controlled
IPC-A-610 addresses electronic assembly acceptability, while IPC-6012 addresses qualification and performance requirements for rigid printed boards. Class 3 applies tighter requirements than Class 2 in areas associated with high-performance and high-reliability operation.
The practical distinction is not a marketing label. It affects fabrication and assembly controls, inspection expectations, workmanship acceptance and documentation.
A Class 3 requirement should therefore be declared in the fabrication and assembly documentation before the quote and process plan are created. Adding it after production data has already been prepared risks forcing a second review of assumptions that were made under different acceptance criteria.
J-STD-001 also affects soldering workmanship and process control. These standards cover different parts of the build, so specifying one does not automatically communicate every requirement that applies to the finished assembly.
Inspection finds defects, but electrical test finds different failures
Optical inspection cannot prove electrical connectivity, and electrical testing cannot replace workmanship inspection.
A useful manufacturing plan separates the purposes:
| Method | Primary manufacturing question |
|---|---|
| SPI | Was solder paste deposited correctly before reflow? |
| AOI | Are visible parts and solder joints positioned and formed correctly? |
| X-ray | What happened under packages or other hidden joints? |
| Flying-probe in-circuit test | Do prototype or lower-volume board nets behave electrically as expected without a dedicated fixture? |
| Bed-of-nails ICT | Can production boards be tested efficiently through fixture-based electrical access? |
| Functional test | Does the assembled product perform the defined operating functions? |
Flying-probe testing is useful when production volume does not justify a dedicated fixture or when a design is still changing. Fixture-based in-circuit test (ICT) becomes more attractive when repeated production can absorb the tooling effort.
Functional test (FCT) answers a different question. Instead of checking only connectivity or component-level conditions, it runs the assembly against a customer-defined operating test and records pass or fail results.
The layout must leave the test process somewhere to make contact. Eliminating accessible test points to save board area can move the difficulty downstream into fault isolation and production troubleshooting.
First article approval protects the production lot
A first article gives engineering and manufacturing a controlled point at which to compare the physical product with the released data before the balance of the production lot is committed.
That review can expose wrong component orientation, drawing conflicts, assembly-note errors, programming issues, mechanical interference or test problems that were not visible in CAD.
The value is economic as much as technical. Catching an error on the first assembled units contains its effect. Discovering the same error after a larger quantity has passed through placement, reflow, inspection and programming multiplies the amount of material and labour tied to the problem.
A first article inspection (FAI) should therefore be treated as a release gate, not as an informal look at the first board off the line.
Prepare one manufacturing package that all stages can interpret
A production release should prevent the fabricator, buyer and assembler from working from different versions of the product.
For PCB manufacturing, useful fabrication inputs include:
- Gerber RS-274X, ODB++ or IPC-2581 data
- NC drill data
- Stackup information
- Impedance targets
- Fabrication notes
For assembly, add:
- Bill of materials in spreadsheet or CSV format
- Pick-and-place or centroid data
- Assembly drawing
- Programming requirements where applicable
- Test requirements and acceptance criteria
Native design data can also be valuable when engineering review requires more information than flattened manufacturing outputs expose.
Revision control matters because an internally consistent old package can be more dangerous than an obviously incomplete one. A fabricator can manufacture the wrong revision very accurately if every file in the package agrees with the wrong release.
Design for the production quantity you actually expect
Prototype, pilot and production builds have different economic pressures even when the circuit itself is unchanged.
At prototype quantities, avoiding dedicated fixtures can matter more than optimizing every second of test time. During pilot production, the emphasis shifts toward confirming repeatability, process controls and documentation. At higher quantities, fixture-based test, panel efficiency and repeatable component supply become increasingly important.
Do not confuse this with redesigning the product for every quantity. The goal is to prevent an early engineering shortcut from blocking the later production method.
A test pad that looks unnecessary on five prototypes may become valuable when hundreds or thousands of assemblies need rapid fault isolation. A component selected because it was available for engineering samples may become a sourcing problem when production demand rises.
Good industrial PCB manufacturing therefore works backward from the intended production state.
Send manufacturing data before production assumptions harden
Once a stackup, via structure, BOM and test strategy are substantially defined, an engineer-reviewed DFM review can expose issues while they are still inexpensive to change. If you are preparing a new industrial circuit board for quotation or production, RLX can review the fabrication and assembly data together before the build is released.
Frequently Asked Questions
What files are needed for an industrial PCB manufacturing quote?
For bare-board fabrication, prepare manufacturing data such as Gerber RS-274X, ODB++, IPC-2581 and NC drill files, plus the stackup, impedance requirements and fabrication notes. For assembly, also provide the BOM, pick-and-place data and assembly drawing. Complete, revision-matched files reduce the number of assumptions required during DFM review and quotation.
What is the difference between PCB fabrication and PCB assembly?
PCB fabrication produces the bare printed circuit board, including the laminate, copper circuitry, drilled and plated holes, solder mask, legend and surface finish. PCB assembly adds the electronic components using surface-mount, through-hole or mixed-technology processes. The stages are separate, but fabrication decisions such as pad geometry and via structure directly affect assembly.
Can an industrial PCB use both through-hole and surface-mount components?
Yes. Mixed-technology assemblies combine surface-mount technology (SMT) with through-hole components where the design requires both. The manufacturing sequence has to account for placement, reflow, through-hole insertion and the selected soldering process. Inspection and test requirements should also reflect which joints are visible and which electrical functions need verification.
How should controlled impedance be specified on a PCB?
Provide the target impedance together with a defined stackup and identify the controlled nets or structures in the manufacturing documentation. Impedance depends on trace geometry, copper thickness and dielectric construction, so a target without stackup context is incomplete. Production verification can use a representative coupon measured by time-domain reflectometry.
When should X-ray inspection be used during PCB assembly?
X-ray inspection is useful when solder joints cannot be evaluated adequately with optical inspection. Common cases include BGA, LGA and QFN packages, including thermal-pad and void evaluation. It complements rather than replaces solder paste inspection, automated optical inspection and electrical test because each method detects a different class of manufacturing problem.
Why does via architecture change PCB manufacturing cost?
Different via structures require different process steps. A conventional through via can be drilled through the laminated board, while blind vias and microvias may require sequential lamination, laser drilling and additional plating operations. Via-in-pad structures can also require resin filling, copper capping and planarization. The cost effect comes from the manufacturing sequence, not simply the number of vias.
