The PCB manufacturing process converts released design data into a physical circuit board through engineering review, imaging, lamination, drilling, plating, etching, solder mask, surface finish, profiling and electrical verification. RLX Solutions, a contract electronics manufacturer in Concord, Ontario, reviews the design package against the proposed manufacturing process before fabrication begins.
A finished bare PCB may look like a single manufactured object, but it is the result of a sequence in which each operation constrains the next. A hole that is easy to draw may require a different lamination sequence. A copper weight change can alter achievable trace geometry. A surface finish affects later soldering and component attachment.
Understanding that sequence helps engineers release files that can move through fabrication without avoidable interpretation, rework or design changes.
1. Manufacturing Starts With the Design Package, Not the Laminate
PCB fabrication begins when manufacturing receives enough information to reconstruct the intended board without guessing. Gerber RS-274X, ODB++ and IPC-2581 can carry PCB manufacturing data, while NC drill files define drilled features. Stackup documentation, impedance targets and fabrication notes add requirements that geometry alone cannot communicate.
The first manufacturing task is therefore data interpretation.
- Copper geometry for each layer
- NC drill data and hole definitions
- Board outline and routed features
- Stackup and finished thickness
- Copper weights
- Controlled-impedance requirements where applicable
- Solder mask and legend data
- Surface finish requirements
- Fabrication notes and applicable workmanship requirements
ODB++ and IPC-2581 can package more manufacturing intelligence into a structured dataset than a collection of independent Gerber layers. Gerber remains widely usable, but the engineer must make sure the separate files agree with the drawing and drill data.
For an assembled printed circuit board, the manufacturing dataset expands. The bill of materials (BOM), pick-and-place or centroid data and assembly drawing have to agree with the bare-board design.
A mismatch can survive surprisingly far into production. If the drill file defines one hole size while a fabrication note calls for another, manufacturing cannot safely infer which requirement controls. Resolving that conflict before tooling is cheaper than discovering it after material has entered the process.
2. Engineer-Reviewed DFM Determines Whether the Drawing Can Become a Repeatable Process
Design for manufacturability (DFM) is the point where PCB geometry meets physical fabrication.
The review examines whether trace widths, spacing, annular rings, holes, copper-to-edge distances, via structures, board thickness and stackup form a compatible manufacturing system. Controlled impedance adds another relationship because trace geometry, dielectric construction and copper thickness interact electrically.
The mechanism matters. A PCB CAD tool can confirm that a via connects the intended nets. It does not automatically prove that the proposed finished hole, board thickness and plating sequence form a sensible drilling and plating process.
Consider a hypothetical 1.6 mm board with a 0.20 mm finished plated hole. The simple thickness-to-hole relationship is 8:1. Reduce the hole to 0.15 mm without changing board thickness and that relationship rises to about 10.7:1.
The schematic has not changed. The netlist has not changed. Yet the fabrication problem has changed because plating must reach farther into a narrower drilled feature. That is why hole geometry belongs in DFM rather than being treated only as a layout parameter.
3. The Stackup Establishes the Manufacturing Architecture
For a multilayer PCB, the stackup determines which copper layers are separated by which dielectric materials, how the layers are laminated and how certain vias can be created.
A simple through-hole design can often be laminated into its multilayer structure and drilled through the completed stack. Blind, buried and stacked microvia structures can change that sequence.
A buried via exists entirely between internal layers. A blind via begins at an outer surface and terminates on an internal layer. A microvia is a small laser-drilled interconnect used where mechanical drilling cannot provide the required interconnect density.
Those definitions become important because the fabricator has to create the hole at a stage when its start and stop layers are physically accessible.
Suppose an 8-layer PCB uses a buried via from Layer 3 to Layer 6. The relevant inner-layer structure must be processed and drilled before the entire 8-layer construction is laminated into its final form. Add Layer 1-to-Layer 2 and Layer 2-to-Layer 3 stacked microvias, and the build sequence changes again because successive structures have to be formed through staged processing.
The via map is therefore also a manufacturing map.
4. Inner Layers Are Imaged and Etched Before Multilayer Lamination
Once the data and stackup are established, internal copper layers can be formed.
The intended conductor pattern is transferred to copper-clad material using photoimaging. Selected copper is then removed through etching, leaving the required traces, planes, pads and other features.
This stage introduces a relationship that engineers sometimes miss: finished copper geometry is influenced by the copper thickness being etched. Removing copper is a physical process, so thicker copper generally demands more lateral allowance than thinner copper for equivalent conductor geometry.
That is why a trace-and-space rule cannot be separated from copper weight.
For example, consider two hypothetical 2-layer designs. Board A uses 1 oz outer copper and 3 mil traces with 3 mil spacing in a dense area. Board B keeps the same layout geometry but changes the copper requirement to 2 oz. The electrical designer may see only a copper-thickness change, while fabrication sees a different etching condition. Geometry that works with one copper construction should not automatically be assumed to transfer unchanged to another.
After imaging and etching, the inner layers have to survive inspection and registration requirements before being incorporated into the multilayer stack.
5. Lamination Turns Separate Layers Into One Multilayer Board
Lamination bonds the prepared cores and dielectric materials into the multilayer construction specified by the stackup.
Heat and pressure consolidate the stack. Registration matters because later drilling must intersect pads distributed through layers that are no longer visible from the surface.
This is where an error from an earlier step can become expensive. A defect on an internal copper layer cannot simply be repaired after the board has been laminated and drilled. The affected structure is now embedded inside the PCB.
Sequential lamination adds another dimension. If the design uses blind vias or certain microvia structures, fabrication may require more than one lamination cycle. Each added cycle exists because some interconnects must be created before another layer of the structure closes access to them.
The number of layers alone therefore does not tell you how difficult a board is to manufacture.
Same Layer Count, Very Different Process
Consider two hypothetical 10-layer PCBs of the same overall size.
| Decision Factor | Board A | Board B |
|---|---|---|
| Layer count | 10 | 10 |
| Main via structure | Through vias | HDI via structure |
| Blind connections | None | Layer 1 to 2 |
| Additional microvias | None | Layer 2 to 3 |
| Buried vias | None | Layer 3 to 8 |
| Lamination logic | Conventional multilayer flow | Sequential processing required |
| Manufacturing consequence | Fewer interdependent via stages | More drilling, plating and lamination interactions |
A quote based mainly on board dimensions and layer count misses the difference.
Board B requires internal via structures to exist before the complete board exists. That changes process routing, registration demands and the number of manufacturing stages that can affect yield and schedule. The cost driver is the architecture, not simply the fact that both designs have ten copper layers.
6. Drilling Establishes the Vertical Connection Geometry
After lamination, mechanical drilling creates plated through-hole locations and other mechanically drilled features. Laser drilling is used for microvias.
A plated through-hole (PTH) becomes electrically useful only after conductive material is established along the hole wall and copper is plated through the barrel. The drill operation therefore has to anticipate what happens during plating.
The finished hole shown on the fabrication drawing is not necessarily the same physical diameter used during the initial drilling operation. Plating occupies space inside the hole, so process compensation is required to arrive at the intended finished geometry.
Annular ring is part of the same system. It is the copper surrounding a drilled hole where the barrel meets a pad. Registration error, drill position and pad diameter all affect the remaining ring.
Higher-reliability workmanship requirements can tighten expectations around features such as annular rings and plating. If a board is intended for IPC-6012 Class 3 fabrication, that requirement should be established before manufacturing rather than treated as a final inspection preference.
7. Hole-Wall Preparation and Copper Plating Create Electrical Continuity
A drilled hole through a multilayer board exposes dielectric and internal copper at the barrel wall. Drilling alone does not electrically connect those layers.
The hole wall has to be prepared, made conductive and plated so copper forms a continuous barrel. Additional copper plating also builds conductor thickness on the board surfaces as required by the fabrication process.
This is why high aspect-ratio holes demand attention. Plating chemistry must reach and deposit copper through the entire barrel rather than building material only near the openings.
Via-in-pad introduces another process requirement. A via located directly in a component pad can create problems during assembly if it remains an open cavity. Solder may migrate into the via instead of remaining where the joint needs it.
Plated over filled via (POFV) processing addresses that problem by filling the via, applying a copper cap and planarizing the surface. The result supports a flatter land for component attachment.
This fabrication choice is directly adjacent to assembly performance. Via architecture cannot always be decided independently of how the component will be soldered.
8. Outer-Layer Imaging and Etching Form the Final Conductor Pattern
After drilling and plating operations establish vertical connectivity, the outer copper pattern is produced.
Photoimaging defines which surface copper remains as traces, pads and planes. Etching removes unwanted copper. As with inner layers, conductor geometry and copper thickness interact.
Fine-pitch component escape routing makes this relationship visible. A designer may need narrow conductors between pads, but simply shrinking the trace in CAD does not create manufacturing margin. Copper thickness, imaging, etching and the surrounding spacing all have to support the geometry.
Consider a hypothetical dense BGA region where routing requires 3 mil trace and 3 mil spacing. If another electrical requirement later pushes the outer layers toward much heavier copper, the routing strategy deserves another fabrication review. A change made for current capacity can affect whether the same fine conductor geometry remains practical.
The engineer should therefore treat copper weight, trace width and spacing as a linked design decision.
9. Solder Mask Protects Copper but Also Controls Pad Exposure
Liquid photoimageable (LPI) solder mask is applied over the board and selectively opened where copper needs to remain exposed for soldering, contacts or other functions.
The mask provides electrical and environmental protection, but its geometry also matters during assembly. Narrow mask webs between closely spaced pads have to survive imaging and processing. If the intended dam becomes too small, manufacturing may need to modify how the mask is opened.
A nominal pad layout can therefore pass copper design rules while creating a separate solder-mask problem.
For dense components, this becomes especially important around fine-pitch pads and via-in-pad structures. Copper, solder mask, via fill and assembly stencil design are different manufacturing layers, but they converge at the same component land.
That convergence is why assembly requirements should be considered before the bare board is released.
10. Surface Finish Protects Exposed Copper and Prepares It for Assembly
Once solder mask has defined the exposed areas, a surface finish is applied to protect those copper surfaces and provide an interface for soldering, contacting or wire bonding.
Common choices include hot air solder levelling (HASL), electroless nickel immersion gold (ENIG), electroless nickel electroless palladium immersion gold (ENEPIG), immersion silver, immersion tin and organic solderability preservative (OSP).
The finish is a functional manufacturing decision, not a cosmetic coating.
The selection can be influenced by pad geometry, assembly process, contact requirements, wire bonding and storage considerations. Gold fingers, for example, perform a different mechanical contact function from ordinary solderable component pads and can call for hard gold rather than a finish selected primarily for solderability.
Finish decisions also reach downstream into assembly. Pad planarity and surface condition affect solder paste deposition, component seating and solder-joint formation.
11. Profiling Creates the Final Mechanical Board Shape
The fabricated production panel eventually has to become the board shape defined by the mechanical design.
Routing, slots, cut-outs and other profile features establish the final outline. These features must agree with the mechanical data used by the enclosure, connector and assembly designs.
Copper placement near the edge deserves attention before this operation. Routing is a mechanical process, and conductors placed too close to the finished edge can create manufacturability and reliability concerns.
Mechanical features also need unambiguous definitions. A plated slot and a non-plated slot are electrically and physically different structures. The fabrication data should make that distinction clear rather than leaving the manufacturer to interpret intent from the drawing.
12. Electrical Testing Checks Connectivity Against the Intended Network
A board that looks correct can still contain an electrical defect.
Bare-board electrical testing checks the manufactured connectivity for opens and shorts against the intended network. This verifies whether the conductive structure behaves as a network before components are placed.
Controlled impedance requires another form of verification. Impedance is created by the physical relationship among conductor geometry, copper thickness, dielectric properties and distance to reference planes. It cannot be confirmed simply because the CAD trace width matches the nominal design value.
Time-domain reflectometry (TDR) can be performed on a representative coupon to verify controlled impedance. That closes the loop between the stackup model and the physical manufacturing result.
This distinction matters for high-speed designs. Electrical continuity tells you that a net is connected. Impedance verification addresses whether the fabricated transmission-line structure matches its electrical target.
13. Inspection Must Follow the Failure Mechanism
No single inspection method can prove every aspect of PCB quality because different defects originate at different process stages.
Inner-layer problems have to be caught before they disappear into lamination. Hole-wall and plating concerns require controls appropriate to drilled structures. Surface imaging defects call for inspection of conductor geometry. Electrical testing finds connectivity failures that visual inspection may not reveal.
For higher-reliability Class 3 fabrication, tighter annular ring and plating requirements can also change sampling and documentation expectations. Cross-section sampling provides a way to examine the internal construction of representative features rather than relying only on what is visible at the board surface.
The useful engineering question is therefore not simply whether the PCB is inspected. It is which process risk each inspection step is intended to detect.
14. Fabrication Decisions Continue Into PCB Assembly
Bare-board fabrication ends before components are placed, but a board should rarely be designed as though fabrication and assembly were unrelated.
Via-in-pad illustrates the connection. Leaving an open via in a component land can change solder behaviour. Filling, capping and planarizing it changes the fabrication sequence specifically to support assembly.
Surface finish is another connection because solderability and pad planarity affect component attachment. Fine-pitch ball grid arrays (BGAs), land grid arrays (LGAs) and quad flat no-lead (QFN) packages also create inspection requirements that cannot be satisfied by viewing only the component perimeter.
Once assembly begins, solder paste inspection (SPI), automated optical inspection (AOI), X-ray inspection and electrical or functional testing address different downstream risks. A fabrication decision that saves one operation can therefore create a more difficult assembly condition later.
The best release package considers the finished electronic assembly, not just whether a bare board can be etched and drilled.
15. What Engineers Should Release to PCB Manufacturing
The manufacturer needs a package that describes both geometry and intent. A clean release reduces the number of assumptions that have to be resolved between quoting, tooling and production.
- Copper and drill data agree. Pad geometry, drill locations and hole definitions should represent the same revision.
- The stackup is explicit. Layer order, board thickness, copper requirements and relevant material requirements should not depend on filename interpretation.
- Via types are identified correctly. Through, blind, buried and microvia structures imply different manufacturing sequences.
- Controlled impedance targets are documented. The fabricator needs the target and stackup context to engineer the physical structure.
- Surface finish is specified. Do not leave the finish to inference from component types.
- Mechanical features are unambiguous. Board outline, slots, cut-outs and plated versus non-plated features need clear definitions.
- Workmanship class is established before quoting. Class 2 versus Class 3 can change fabrication and documentation requirements.
- Assembly files match the fabrication revision. If the project continues into assembly, the BOM, centroid data and assembly drawing must describe the same board that is being fabricated.
Revision control ties all eight points together. A technically correct Gerber package paired with an older drill file is still an incorrect manufacturing release.
16. Send the Complete Manufacturing Package Before Production Decisions Are Locked
If you are preparing a printed circuit board for fabrication or assembly, RLX can review the manufacturing data as part of the quoting process. Send the applicable Gerber RS-274X, ODB++ or IPC-2581 data, NC drill files, stackup and fabrication notes, plus the BOM, pick-and-place data and assembly drawing when assembly is included.
Frequently Asked Questions
What files are needed to manufacture a PCB?
A bare PCB release normally needs manufacturing artwork such as Gerber RS-274X, ODB++ or IPC-2581, plus NC drill data and the documentation needed to define the stackup, impedance targets and fabrication requirements. For assembly, add the BOM, pick-and-place or centroid file and assembly drawing. The files should all represent the same released revision.
What is the difference between PCB fabrication and PCB assembly?
PCB fabrication creates the bare circuit board, including its copper layers, drilled and plated connections, solder mask, surface finish and mechanical profile. PCB assembly begins after that bare board exists and places and solders electronic components onto it. The processes are separate, but fabrication choices such as via-in-pad construction and surface finish can directly affect assembly.
Can Gerber files contain everything a PCB manufacturer needs?
Gerber files describe manufacturing artwork, but a complete build can require information beyond copper images. Drill definitions, stackup, finished thickness, copper requirements, controlled-impedance targets, surface finish and fabrication notes may also be required. The important point is whether the package defines the intended physical board without contradictory or missing requirements.
Why are blind and buried vias more involved than through vias?
A through via can be drilled through the laminated board because it connects through the finished stack. Blind and buried vias terminate within the stack, so some holes have to be created while their target layers remain physically accessible. That can require sequential lamination, adding process stages and making the via architecture part of the stackup design.
How is controlled impedance verified after PCB fabrication?
Controlled impedance depends on the manufactured conductor geometry, dielectric structure, copper thickness and reference-plane relationship. A time-domain reflectometry measurement can be performed on a representative test coupon to verify the resulting impedance. This provides physical verification beyond checking that the artwork contains the nominal trace width specified during design.
Why should PCB assembly requirements be considered before bare-board fabrication?
Some fabrication choices determine what happens during soldering and inspection. An open via inside a component pad can draw solder away from the joint, while filling and capping the via creates a different mounting surface. Surface finish and pad geometry also affect solderability and component attachment. Assembly constraints therefore belong in design and fabrication review before the bare board is released.
